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<title>lwn.git/drivers/iommu/tegra-gart.c, branch docs-5.2a</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-5.2a</id>
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<updated>2019-01-16T12:54:16+00:00</updated>
<entry>
<title>iommu/tegra: gart: Perform code refactoring</title>
<updated>2019-01-16T12:54:16+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:07+00:00</published>
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<id>urn:sha1:707223095ccf1fd81c9fa5346239b79127c322c2</id>
<content type='text'>
Removed redundant safety-checks in the code and some debug code that
isn't actually very useful for debugging, like enormous pagetable dump
on each fault. The majority of the changes are code reshuffling,
variables/whitespaces clean up and removal of debug messages that
duplicate messages of the IOMMU-core. Now the GART translation is kept
disabled while GART is suspended.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Simplify clients-tracking code</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:06+00:00</published>
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<id>urn:sha1:e7e2367041179318591d3a656f146e20418f99bb</id>
<content type='text'>
GART is a simple IOMMU provider that has single address space. There is
no need to setup global clients list and manage it for tracking of the
active domain, hence lot's of code could be safely removed and replaced
with a simpler alternative.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Don't detach devices from inactive domains</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:05+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=cc0e1205766b8be1e6f7985991ad80c8c5e791c2'/>
<id>urn:sha1:cc0e1205766b8be1e6f7985991ad80c8c5e791c2</id>
<content type='text'>
There could be unlimited number of allocated domains, but only one domain
can be active at a time. Hence devices must be detached only from the
active domain.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Prepend error/debug messages with "gart:"</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:04+00:00</published>
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<id>urn:sha1:5dd82cdb36880e0c87b58a002a0513cfbc18552a</id>
<content type='text'>
GART became a part of Memory Controller, hence now the drivers device
is Memory Controller and not GART. As a result all printed messages are
prepended with the "tegra-mc 7000f000.memory-controller:", so let's
prepend GART's messages with "gart:" in order to differentiate them
from the MC.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Don't use managed resources</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:03+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=167d67d550b9e94207578679c3a6feef78449f38'/>
<id>urn:sha1:167d67d550b9e94207578679c3a6feef78449f38</id>
<content type='text'>
GART is a part of the Memory Controller driver that is always built-in,
hence there is no benefit from the use of managed resources.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Allow only one active domain at a time</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:02+00:00</published>
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<id>urn:sha1:7d849b7b40b9b3f574f50bbf44503b38e319fca5</id>
<content type='text'>
GART has a single address space that is shared by all devices, hence only
one domain could be active at a time.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Fix NULL pointer dereference</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:01+00:00</published>
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<id>urn:sha1:8e924910dd07f1614fe534f8bdfdc17f7de3d68b</id>
<content type='text'>
Fix NULL pointer dereference on IOMMU domain destruction that happens
because clients list is being iterated unsafely and its elements are
getting deleted during the iteration.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Fix spinlock recursion</title>
<updated>2019-01-16T12:54:14+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:39:00+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=c3086fad2755f5e446f6a69fda3b2a8c16a1b5ce'/>
<id>urn:sha1:c3086fad2755f5e446f6a69fda3b2a8c16a1b5ce</id>
<content type='text'>
Fix spinlock recursion bug that happens on IOMMU domain destruction if
any of the allocated domains have devices attached to them.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Integrate with Memory Controller driver</title>
<updated>2019-01-16T12:54:12+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:56+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=ce2785a75dbca27375f3723f4e697a2a8dc096ee'/>
<id>urn:sha1:ce2785a75dbca27375f3723f4e697a2a8dc096ee</id>
<content type='text'>
The device-tree binding has been changed. There is no separate GART device
anymore, it is squashed into the Memory Controller. Integrate GART module
with the MC in a way it is done for the SMMU on Tegra30+.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/tegra: gart: Optimize mapping / unmapping performance</title>
<updated>2019-01-16T12:54:09+00:00</updated>
<author>
<name>Dmitry Osipenko</name>
<email>digetx@gmail.com</email>
</author>
<published>2018-12-12T20:38:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=2fc0ac180d0f160cdd5fc69407ca7eb47b3eff99'/>
<id>urn:sha1:2fc0ac180d0f160cdd5fc69407ca7eb47b3eff99</id>
<content type='text'>
Currently GART writes one page entry at a time. More optimal would be to
aggregate the writes and flush BUS buffer in the end, this gives map/unmap
10-40% performance boost (depending on size of mapping) in comparison to
flushing after each page entry update.

Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
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