<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/iio/dac, branch master</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
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<updated>2026-05-15T11:05:35+00:00</updated>
<entry>
<title>iio: dac: ad5686: fix powerdown control on dual-channel devices</title>
<updated>2026-05-15T11:05:35+00:00</updated>
<author>
<name>Rodrigo Alencar</name>
<email>rodrigo.alencar@analog.com</email>
</author>
<published>2026-05-05T12:35:05+00:00</published>
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<id>urn:sha1:8aeaf25a85263a7a43357e16ad78ab969f6f8aeb</id>
<content type='text'>
Fix powerdown control by using a proper bit shift for the powerdown mask
values. During initialization, powerdown bits are initialized so that
unused bits are set to 1 and the correct bit shift is used. Dual-channel
devices use one-hot encoding in the address and that reflects on the
position of the powerdown bits, which are not channel-index based
for that case. Quad-channel devices also use one-hot encoding for the
channel address but the result of log2(address) coincides with the channel
index value. Mask as 0x3U is used rather than 0x3, because shift can reach
value of 30 (last channel of a 16-channel device), which would mess with
the sign bit. The issue was introduced when first adding support for
dual-channel devices, which overlooked powerdown control differences.

Fixes: 7dc8faeab3e3 ("iio: dac: ad5686: add support for AD5338R")
Signed-off-by: Rodrigo Alencar &lt;rodrigo.alencar@analog.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: ad5686: acquire lock when doing powerdown control</title>
<updated>2026-05-15T11:05:35+00:00</updated>
<author>
<name>Rodrigo Alencar</name>
<email>rodrigo.alencar@analog.com</email>
</author>
<published>2026-05-05T12:35:04+00:00</published>
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<id>urn:sha1:5237c3175cae5ab05f18878cec3301a04403859e</id>
<content type='text'>
Protect access of pwr_down_mode and pwr_down_mask fields with existing
mutex lock. Each channel exposes their own attributes for controlling
powerdown modes and powerdown state. This fixes potential race conditions
as those the write functions perform non-atomic read-modify-write
operations to those pwr_down_* fields. This issue exists since the ad5686
driver was first introduced.

Fixes: c2f37c8dcadc ("iio: dac: New driver for AD5686R, AD5685R, AD5684R Digital to analog converters")
Signed-off-by: Rodrigo Alencar &lt;rodrigo.alencar@analog.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: ad3530r: Fix AD3531/AD3531R powerdown mode strings</title>
<updated>2026-05-15T11:05:35+00:00</updated>
<author>
<name>Kim Seer Paller</name>
<email>kimseer.paller@analog.com</email>
</author>
<published>2026-05-05T04:34:32+00:00</published>
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<id>urn:sha1:ebd250c2581ec46c64c73fdfa918c9a7f757505e</id>
<content type='text'>
The AD3531/AD3531R has different output operating modes from the
AD3530/AD3530R. According to the AD3531/AD3531R datasheet, the
powerdown modes are:
  01: 500 Ohm output impedance
  10: 3.85 kOhm output impedance
  11: 16 kOhm output impedance

The driver currently uses the AD3530R modes (1k, 7.7k, 32k) for all
variants, which is incorrect for AD3531/AD3531R.

Add AD3531R-specific powerdown mode strings and assign them to the
AD3531/AD3531R chip variants.

Fixes: 93583174a3df ("iio: dac: ad3530r: Add driver for AD3530R and AD3531R")
Signed-off-by: Kim Seer Paller &lt;kimseer.paller@analog.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: ad5686: fix input raw value check</title>
<updated>2026-05-15T11:05:34+00:00</updated>
<author>
<name>Rodrigo Alencar</name>
<email>rodrigo.alencar@analog.com</email>
</author>
<published>2026-05-01T09:14:55+00:00</published>
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<id>urn:sha1:d01220ee5e43c65a206df827b39bf5cf5f7b9dce</id>
<content type='text'>
Fix range check for input raw value, which is off by one, i.e., for a
10-bit DAC the max valid value is 1023, but 1 &lt;&lt; 10 equals 1024, which
passes the previous check, allowing an out-of-range write. The issue
exists since the ad5686 driver was first introduced.

Fixes: c2f37c8dcadc ("iio: dac: New driver for AD5686R, AD5685R, AD5684R Digital to analog converters")
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Rodrigo Alencar &lt;rodrigo.alencar@analog.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: ad5686: fix ref bit initialization for single-channel parts</title>
<updated>2026-05-15T11:05:34+00:00</updated>
<author>
<name>Rodrigo Alencar</name>
<email>rodrigo.alencar@analog.com</email>
</author>
<published>2026-05-01T09:14:54+00:00</published>
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<id>urn:sha1:ecae2ae606d493cf11457946436335bd0e726663</id>
<content type='text'>
The reference bit position was ignored when writing the register at the
probe() function (!!val was used). When such bit is 1, internal voltage
reference is disabled so that an external one can be used. For
multi-channel devices, bit 0 of the Internal Reference Setup command
behaves the same way, so AD5686_REF_BIT_MSK is created. The issue exists
since support for single-channel devices were first introduced.

Fixes: be1b24d24541 ("iio:dac:ad5686: Add AD5691R/AD5692R/AD5693/AD5693R support")
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Rodrigo Alencar &lt;rodrigo.alencar@analog.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: max5821: fix return value check in powerdown sync</title>
<updated>2026-05-15T11:05:34+00:00</updated>
<author>
<name>Salah Triki</name>
<email>salah.triki@gmail.com</email>
</author>
<published>2026-04-27T21:33:19+00:00</published>
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<id>urn:sha1:d0a228d903425e653f18a4341e60c0538afb6d41</id>
<content type='text'>
The function max5821_sync_powerdown_mode() returned the result of
i2c_master_send() directly. If a partial transfer occurred, it would
be incorrectly treated as a success by the caller.

While the caller currently handles the positive return value of 2 as
success, this patch refactors the function to return 0 on full success
and -EIO on short writes. This ensures robust error handling for
incomplete transfers and improves code maintainability by using
sizeof(outbuf).

Fixes: 472988972737 ("iio: add support of the max5821")
Signed-off-by: Salah Triki &lt;salah.triki@gmail.com&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;jic23@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v7.0-rc7' into char-misc-next</title>
<updated>2026-04-06T07:04:53+00:00</updated>
<author>
<name>Greg Kroah-Hartman</name>
<email>gregkh@linuxfoundation.org</email>
</author>
<published>2026-04-06T07:04:53+00:00</published>
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<id>urn:sha1:a5210135489ae7bc1ef1cb4a8157361dd7b468cd</id>
<content type='text'>
We need the char/misc/iio/comedi fixes in here as well for testing

Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>iio: dac: ds4424: add Rfs-based scale and per-variant limits</title>
<updated>2026-03-22T12:44:23+00:00</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2026-02-10T13:51:10+00:00</published>
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<id>urn:sha1:af980a79bfed43c4a0be12cca786be46f1a0c5e8</id>
<content type='text'>
Parse optional maxim,rfs-ohms values to derive the per-channel output
current scale (mA per step) for the IIO current ABI.

Behavior changes:
- If maxim,rfs-ohms is present, IIO_CHAN_INFO_SCALE becomes available
  and reports mA/step derived from Rfs.
- If maxim,rfs-ohms is missing, SCALE is not exposed to keep older DTs
  working without requiring updates.

Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: dac: ds4424: convert to regmap</title>
<updated>2026-03-22T12:44:23+00:00</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2026-02-10T13:51:08+00:00</published>
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<id>urn:sha1:cfeae3ce3e5a5755aeada4930a84cf4cbac3ea10</id>
<content type='text'>
Refactor the driver to use the regmap API.

Replace the driver-specific mutex and manual shadow buffers with the
standard regmap infrastructure for locking and caching.

This ensures the cache is populated from hardware at probe, preventing
state desynchronization (e.g. across suspend/resume).

Define access tables to validate the different register maps of DS44x2
and DS44x4.

Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Reviewed-by: Sander Vanheule &lt;sander@svanheule.net&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: dac: ds4424: support per-variant output range limits</title>
<updated>2026-03-22T12:43:48+00:00</updated>
<author>
<name>Oleksij Rempel</name>
<email>o.rempel@pengutronix.de</email>
</author>
<published>2026-02-10T13:51:07+00:00</published>
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<id>urn:sha1:8d68801a696ce101349db6896c10afb5f8d1c228</id>
<content type='text'>
The DS4402/DS4404 variants operate with a 5-bit resolution (31 steps),
whereas the DS4422/DS4424 support 7-bit (127 steps).

Previously, the driver enforced a hardcoded 7-bit mask (DS4424_DAC_MASK)
for all variants. This allowed users to write values exceeding the 5-bit
range to DS4402/DS4404 devices, resulting in silent truncation or
undefined behavior.

Add a `result_mask` field to the chip_info structure to define the valid
data range for each variant. Use this mask to:
1. Correctly mask register values in read_raw().
2. Return -EINVAL in write_raw() if the input value exceeds the
   variant's capabilities.

Signed-off-by: Oleksij Rempel &lt;o.rempel@pengutronix.de&gt;
Reviewed-by: Andy Shevchenko &lt;andriy.shevchenko@intel.com&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
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