<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h, branch master</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=master</id>
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<updated>2025-12-24T09:24:19+00:00</updated>
<entry>
<title>Revert "drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case"</title>
<updated>2025-12-24T09:24:19+00:00</updated>
<author>
<name>Abel Vesa</name>
<email>abel.vesa@oss.qualcomm.com</email>
</author>
<published>2025-12-19T10:39:02+00:00</published>
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<id>urn:sha1:da9168d8ef1cbc5dcd1cee91416bd7b408ca8377</id>
<content type='text'>
This reverts commit d7ec9366b15cd04508fa015cb94d546b1c01edfb.

The dual-DSI dual-DSC scenario seems to be broken by this commit.

Reported-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Closes: https://lore.kernel.org/r/aUR2b3FOSisTfDFj@SoMainline.org
Signed-off-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
Fixes: d7ec9366b15c ("drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case")
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/695550/
Link: https://lore.kernel.org/r/20251219-drm-msm-dpu-revert-quad-pipe-broken-v1-2-654b46505f84@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>drm/msm/dpu: Enable quad-pipe for DSC and dual-DSI case</title>
<updated>2025-11-14T14:59:27+00:00</updated>
<author>
<name>Jun Nie</name>
<email>jun.nie@linaro.org</email>
</author>
<published>2025-09-18T13:29:02+00:00</published>
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<id>urn:sha1:d7ec9366b15cd04508fa015cb94d546b1c01edfb</id>
<content type='text'>
To support high-resolution cases that exceed the width limitation of
a pair of SSPPs, or scenarios that surpass the maximum MDP clock rate,
additional pipes are necessary to enable parallel data processing
within the SSPP width constraints and MDP clock rate.

Request 4 mixers and 4 DSCs for high-resolution cases where both DSC
and dual interfaces are enabled. More use cases can be incorporated
later if quad-pipe capabilities are required.

Signed-off-by: Jun Nie &lt;jun.nie@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/675418/
Link: https://lore.kernel.org/r/20250918-v6-16-rc2-quad-pipe-upstream-4-v16-10-ff6232e3472f@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>drm/msm/dpu: Configure CWB in writeback encoder</title>
<updated>2025-03-05T02:34:12+00:00</updated>
<author>
<name>Jessica Zhang</name>
<email>quic_jesszhan@quicinc.com</email>
</author>
<published>2025-02-15T00:14:31+00:00</published>
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<id>urn:sha1:dd331404ac7c155b2863038864901049fcf9d3fe</id>
<content type='text'>
Cache the CWB block mask in the DPU virtual encoder and configure CWB
according to the CWB block mask within the writeback phys encoder

Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637501/
Link: https://lore.kernel.org/r/20250214-concurrent-wb-v6-8-a44c293cf422@quicinc.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dpu: rework documentation comments</title>
<updated>2024-11-03T16:21:39+00:00</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2024-11-02T08:46:09+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=86313a9cd152330c634b25d826a281c6a002eb77'/>
<id>urn:sha1:86313a9cd152330c634b25d826a281c6a002eb77</id>
<content type='text'>
Unfortunately the tooling doesn't check documents placed before funciton
prototypes. Such comments frequently become outdated, miss several
params, etc. Move documentation for the functions to be placed before
the actual function body, allowing 'make W=1' to actually check these
comments and report an error.

Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/622690/
Link: https://lore.kernel.org/r/20241102-dpu-docs-rework-v1-1-d735853fd6db@linaro.org
</content>
</entry>
<entry>
<title>drm/msm/dpu: fix video mode DSC for DSI</title>
<updated>2024-06-22T22:15:39+00:00</updated>
<author>
<name>Jonathan Marek</name>
<email>jonathan@marek.ca</email>
</author>
<published>2024-05-30T05:56:45+00:00</published>
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<id>urn:sha1:f9ce482d7dc0ca47fff6d192d29d39f1df7c3441</id>
<content type='text'>
Add width change in DPU timing for DSC compression case to work with
DSI video mode.

Signed-off-by: Jonathan Marek &lt;jonathan@marek.ca&gt;
Signed-off-by: Jun Nie &lt;jun.nie@linaro.org&gt;
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt; # on SM8550-QRD
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt; # on SM8650-QRD
Tested-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt; # on SM8650-HDK
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/596227/
Link: https://lore.kernel.org/r/20240530-msm-drm-dsc-dsi-video-upstream-4-v6-1-2ab1d334c657@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>Revert "drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set"</title>
<updated>2024-06-05T22:53:29+00:00</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2024-05-22T10:24:28+00:00</published>
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<id>urn:sha1:35322c39a653c775670f0713fb96ccc2cd91a747</id>
<content type='text'>
In the DPU driver blank IRQ handling is called from a vblank worker and
can happen outside of the irq_enable / irq_disable pair. Using the
worker makes that completely asynchronous with the rest of the code.
Revert commit d13f638c9b88 ("drm/msm/dpu: drop
dpu_encoder_phys_ops.atomic_mode_set") to fix vblank IRQ assignment for
CMD DSI panels.

Call trace:
 dpu_encoder_phys_cmd_control_vblank_irq+0x218/0x294
  dpu_encoder_toggle_vblank_for_crtc+0x160/0x194
  dpu_crtc_vblank+0xbc/0x228
  dpu_kms_enable_vblank+0x18/0x24
  vblank_ctrl_worker+0x34/0x6c
  process_one_work+0x218/0x620
  worker_thread+0x1ac/0x37c
  kthread+0x114/0x118
  ret_from_fork+0x10/0x20

Fixes: d13f638c9b88 ("drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set")
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/595065/
Link: https://lore.kernel.org/r/20240522-dpu-revert-ams-v2-1-b37825d708e1@linaro.org
Signed-off-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Rob Clark &lt;robdclark@chromium.org&gt;
</content>
</entry>
<entry>
<title>drm/msm: merge dpu_format and mdp_format in struct msm_format</title>
<updated>2024-04-23T09:56:29+00:00</updated>
<author>
<name>Dmitry Baryshkov</name>
<email>dmitry.baryshkov@linaro.org</email>
</author>
<published>2024-04-20T04:01:02+00:00</published>
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<id>urn:sha1:0e67f514486f0aec823415c379fc274dfa096c18</id>
<content type='text'>
Structures dpu_format and mdp_format are largely the same structures.
In order to remove duplication between format databases, merge these two
stucture definitions into the global struct msm_format.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/590434/
Link: https://lore.kernel.org/r/20240420-dpu-format-v2-5-9e93226cbffd@linaro.org
</content>
</entry>
<entry>
<title>drm/msm/dpu: modify encoder programming for CDM over DP</title>
<updated>2024-03-04T09:38:51+00:00</updated>
<author>
<name>Paloma Arellano</name>
<email>quic_parellan@quicinc.com</email>
</author>
<published>2024-02-22T19:40:01+00:00</published>
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<id>urn:sha1:b40c8377d792cfae38e7b82dca03aae147de6585</id>
<content type='text'>
Adjust the encoder format programming in the case of video mode for DP
to accommodate CDM related changes.

Changes in v4:
	- Remove hw_cdm check in dpu_encoder_needs_periph_flush()
	- Remove hw_cdm check when getting the fmt_fourcc in
	  dpu_encoder_phys_vid_enable()

Changes in v2:
	- Move timing engine programming to a separate patch from this
	  one
	- Move update_pending_flush_periph() invocation completely to
	  this patch
	- Change the logic of dpu_encoder_get_drm_fmt() so that it only
	  calls drm_mode_is_420_only() instead of doing additional
	  unnecessary checks
	- Create new functions msm_dp_needs_periph_flush() and it's
	  supporting function dpu_encoder_needs_periph_flush() to check
	  if the mode is YUV420 and VSC SDP is enabled before doing a
	  peripheral flush

Signed-off-by: Paloma Arellano &lt;quic_parellan@quicinc.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/579641/
Link: https://lore.kernel.org/r/20240222194025.25329-17-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dpu: move dpu_encoder_helper_phys_setup_cdm to dpu_encoder</title>
<updated>2024-03-04T09:34:20+00:00</updated>
<author>
<name>Paloma Arellano</name>
<email>quic_parellan@quicinc.com</email>
</author>
<published>2024-02-22T19:39:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=0ab07bb96826f4006a90840fbda51df501a905e3'/>
<id>urn:sha1:0ab07bb96826f4006a90840fbda51df501a905e3</id>
<content type='text'>
Move dpu_encoder_helper_phys_setup_cdm to dpu_encoder in preparation for
implementing YUV420 over DP, which requires CDM compatibility.

Changes in v2:
	- Slightly change the wording of the commit text to make clear
	  that YUV over DP requires CDM

Signed-off-by: Paloma Arellano &lt;quic_parellan@quicinc.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/579611/
Link: https://lore.kernel.org/r/20240222194025.25329-6-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dpu: allow dpu_encoder_helper_phys_setup_cdm to work for DP</title>
<updated>2024-03-04T09:30:35+00:00</updated>
<author>
<name>Paloma Arellano</name>
<email>quic_parellan@quicinc.com</email>
</author>
<published>2024-02-22T19:39:49+00:00</published>
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<id>urn:sha1:7cde7ce5be3e0344d70a5ef8d27190b0a24aa6a0</id>
<content type='text'>
Generalize dpu_encoder_helper_phys_setup_cdm to be compatible with DP.

Changes in v2:
	- Minor formatting changes
	- Move the modification of the dimensions for CDM setup to a new
	  patch

Signed-off-by: Paloma Arellano &lt;quic_parellan@quicinc.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/579609/
Link: https://lore.kernel.org/r/20240222194025.25329-5-quic_parellan@quicinc.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
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