<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c, branch alabaster</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=alabaster</id>
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<updated>2022-07-05T20:18:36+00:00</updated>
<entry>
<title>drm/amdgpu: keep fbdev buffers pinned during suspend</title>
<updated>2022-07-05T20:18:36+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-06-21T14:04:55+00:00</published>
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<id>urn:sha1:89e2b4373ae5215f5c5d1b7726549950daa77018</id>
<content type='text'>
Was dropped when we converted to the generic helpers.

Fixes: 087451f372bf ("drm/amdgpu: use generic fb helpers instead of setting up AMD own's.")
Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: expose additional modifier for DCN32/321</title>
<updated>2022-06-29T21:12:18+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-06-28T20:25:28+00:00</published>
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<id>urn:sha1:ff15cea338d2c78e0086d55c8a9dd637a5dd3ccc</id>
<content type='text'>
[Why&amp;How]
Some userspace expect a backwards compatible modifier on DCN32/321. For
hardware with num_pipes more than 16, we expose the most efficient
modifier first. As a fall back method, we need to expose slightly inefficient
modifier AMD_FMT_MOD_TILE_GFX9_64K_R_X after the best option.

Also set the number of packers to fixed value as required per hardware
documentation. This value is cached during hardware initialization and
can be read through the base driver.

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Reviewed-by: Bas Nieuwenhuizen &lt;bas@basnieuwenhuizen.nl&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Add GFX11 modifiers support to AMDGPU (v3)</title>
<updated>2022-06-03T20:43:38+00:00</updated>
<author>
<name>Aurabindo Pillai</name>
<email>aurabindo.pillai@amd.com</email>
</author>
<published>2022-02-21T20:33:05+00:00</published>
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<id>urn:sha1:543036a2de71f14f8ad566c858e5e9ff61736a86</id>
<content type='text'>
GFX11 IP introduces new tiling mode. Various combinations of DCC
settings are possible and the most preferred settings must be exposed
for optimal use of the hardware.

add_gfx11_modifiers() is based on recommendation from Marek for the
preferred tiling modifier that are most efficient for the hardware.

v2: microtiling fix noticed by Marek
v3: keep Z tiling check

Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.19-2022-04-15' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2022-04-28T04:33:20+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2022-04-28T04:33:20+00:00</published>
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<id>urn:sha1:dbe946287e0825f0e9cd4cbeacfcde9d9b2dd168</id>
<content type='text'>
amd-drm-next-5.19-2022-04-15:

amdgpu:
- USB-C updates
- GPUVM updates
- TMZ fixes for RV
- DCN 3.1 pstate fixes
- Display z state fixes
- RAS fixes
- Misc code cleanups and spelling fixes
- More DC FP rework
- GPUVM TLB handling rework
- Power management sysfs code cleanup
- Add RAS support for VCN
- Backlight fix
- Add unique id support for more asics
- Misc display updates
- SR-IOV fixes
- Extend CG and PG flags to 64 bits
- Enable VCN clk sysfs nodes for navi12

amdkfd:
- Fix IO link cleanup during device removal
- RAS fixes
- Retry fault fixes
- Asynchronously free events
- SVM fixes

radeon:
- Drop some dead code
- Misc code cleanups

From: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220415135144.5700-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>dma-buf: add enum dma_resv_usage v4</title>
<updated>2022-04-07T10:53:53+00:00</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2021-11-09T10:08:18+00:00</published>
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<id>urn:sha1:7bc80a5462c37eab58a9ea386064307c0f447fd1</id>
<content type='text'>
This change adds the dma_resv_usage enum and allows us to specify why a
dma_resv object is queried for its containing fences.

Additional to that a dma_resv_usage_rw() helper function is added to aid
retrieving the fences for a read or write userspace submission.

This is then deployed to the different query functions of the dma_resv
object and all of their users. When the write paratermer was previously
true we now use DMA_RESV_USAGE_WRITE and DMA_RESV_USAGE_READ otherwise.

v2: add KERNEL/OTHER in separate patch
v3: some kerneldoc suggestions by Daniel
v4: some more kerneldoc suggestions by Daniel, fix missing cases lost in
    the rebase pointed out by Bas.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20220407085946.744568-2-christian.koenig@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Re-classify some log messages in commit path</title>
<updated>2022-03-28T16:54:39+00:00</updated>
<author>
<name>Sean Paul</name>
<email>seanpaul@chromium.org</email>
</author>
<published>2022-03-25T00:06:19+00:00</published>
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<id>urn:sha1:9f07550b3c8a79cbb996a368f699c9eb619d8322</id>
<content type='text'>
ATOMIC and DRIVER log categories do not typically contain per-frame log
messages. This patch re-classifies some messages in amd to chattier
categories to keep ATOMIC/DRIVER quiet.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Sean Paul &lt;seanpaul@chromium.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make amdgpu_display_gem_fb_verify_and_init() static</title>
<updated>2022-03-25T16:40:25+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-03-14T18:42:03+00:00</published>
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<id>urn:sha1:c5b266810c5105b6c115de6236247049c23502db</id>
<content type='text'>
Unused outside of amdgpu_display.c.

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: drop amdgpu_display_gem_fb_init()</title>
<updated>2022-03-25T16:40:25+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-03-14T18:40:33+00:00</published>
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<id>urn:sha1:60da2f7440f22dba48944602c2a0373068f13880</id>
<content type='text'>
Unused.

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make amdgpu_display_framebuffer_init() static</title>
<updated>2022-03-25T16:40:25+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-03-14T18:38:19+00:00</published>
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<id>urn:sha1:31d5c52346cce168022b69b962023186b03eb43c</id>
<content type='text'>
It's not used outside of amdgpu_display.c.

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use IP versions in convert_tiling_flags_to_modifier()</title>
<updated>2022-03-02T23:40:07+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2022-02-28T19:31:59+00:00</published>
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<id>urn:sha1:45a3e06be4d351af8f81b43407b3eafa5c75827d</id>
<content type='text'>
Rather than checking the asic_type.

Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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