<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/drivers/char/drm/radeon_drv.h, branch v2.6.20-rc4</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v2.6.20-rc4</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v2.6.20-rc4'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/'/>
<updated>2006-12-15T07:54:35+00:00</updated>
<entry>
<title>drm: Unify radeon offset checking.</title>
<updated>2006-12-15T07:54:35+00:00</updated>
<author>
<name>=?utf-8?q?Michel_D=C3=A4nzer?=</name>
<email>michel@tungstengraphics.com</email>
</author>
<published>2006-12-15T07:54:35+00:00</published>
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<id>urn:sha1:1d6bb8e51dba3db1c15575901022fe72d363e5a4</id>
<content type='text'>
Replace r300_check_offset() with generic radeon_check_offset(), which doesn't
reject valid offsets when the framebuffer area is at the very end of the card's
32 bit address space. Make radeon_check_and_fixup_offset() use
radeon_check_offset() as well.

This fixes https://bugs.freedesktop.org/show_bug.cgi?id=7697 .
</content>
</entry>
<entry>
<title>drm: Use register writes instead of BITBLT_MULTI packets for buffer swap blits</title>
<updated>2006-09-21T19:32:34+00:00</updated>
<author>
<name>Michel Daenzer</name>
<email>michel@tungstengraphics.com</email>
</author>
<published>2006-09-21T18:26:35+00:00</published>
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<id>urn:sha1:3e14a2867d8ccf555fe6e318eac0f8200399fe1c</id>
<content type='text'>
This takes up two more ring buffer entries per rectangle blitted but makes sure
the blit is performed top to bottom, reducing the likelyhood of tearing.

Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: use radeon specific names for radeon flags</title>
<updated>2006-09-21T19:32:34+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-09-21T18:25:09+00:00</published>
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<id>urn:sha1:54a56ac583ac66f3f4bc2c4cc3ef9b0676770742</id>
<content type='text'>
Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: realign sosme radeon code with drm git tree</title>
<updated>2006-09-21T19:32:33+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-08-19T07:43:52+00:00</published>
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<id>urn:sha1:b15ec36806ce3b89a2fddce958de9370efb249da</id>
<content type='text'>
this applies some minor cleanups for the radeon driver, to use the
3D flush and reset the AGP flags on X recycle

Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: radeon: Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT.</title>
<updated>2006-09-21T19:32:31+00:00</updated>
<author>
<name>Michel Dänzer</name>
<email>michel@tungstengraphics.com</email>
</author>
<published>2006-08-07T10:41:53+00:00</published>
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<id>urn:sha1:b9b603dd1c99a68e65ad51cda25379441df2e17b</id>
<content type='text'>
The latter seems to be a read-only mirror of the former.

Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: radeon: fix up bus mastering when writeback is disabled</title>
<updated>2006-09-21T19:32:30+00:00</updated>
<author>
<name>Michel Dänzer</name>
<email>michel@tungstengraphics.com</email>
</author>
<published>2006-08-07T10:37:46+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=ae1b1a4816ac11075d338af79a239f4c326d675c'/>
<id>urn:sha1:ae1b1a4816ac11075d338af79a239f4c326d675c</id>
<content type='text'>
When writeback isn't used, actually disable it in the hardware.

Not doing this might waste bus bandwidth or even cause memory corruption or
system crashes on systems that check bus transfers. No such incident has been
reported though.

Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: update radeon to 1.25 add r200 vertex program support</title>
<updated>2006-06-24T07:32:10+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-06-24T07:04:07+00:00</published>
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<id>urn:sha1:d6fece051a4ef330922bfafb9d64e3e133e3a8a6</id>
<content type='text'>
Add support for r200 vertex programs (R200_EMIT_VAP_PVS_CNTL, and new
packet type for making it possible to address whole tcl vector space
and have a larger count)

From: Roland Scheidegger (DRM CVS)
Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: radeon add a tcl state flush before accessing tcl vector space</title>
<updated>2006-06-24T07:32:04+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-06-24T06:55:34+00:00</published>
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<id>urn:sha1:f2a2279ffc0dfd27f6909184a29910e40ae7eebd</id>
<content type='text'>
Do a tcl state flush before accessing tcl vector space. This fixes some
more problems with flickering (bug #6637). drm may not be appropriate
place for this, since doing that flush there might both be overkill and
insufficient in some cases. However, it's hard to figure out when that
flush is needed, so this has to suffice. There does not seem to be a
performance penalty associated with it.

From: Roland Scheidegger (DRM CVS)
Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: add new radeon PCI ids..</title>
<updated>2006-03-25T07:09:46+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-03-25T07:09:46+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=f3dd5c37382472a8b245ad791ed768771594e60c'/>
<id>urn:sha1:f3dd5c37382472a8b245ad791ed768771594e60c</id>
<content type='text'>
This adds all the r300 and r400 PCI ids from DRM CVS, it also
makes these cards only initialise when the new xorg driver is
used, as otherwise the DRM can cause lockups.

Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
<entry>
<title>drm: rationalise some pci ids</title>
<updated>2006-03-19T09:01:37+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@linux.ie</email>
</author>
<published>2006-03-19T09:01:37+00:00</published>
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<id>urn:sha1:dfab11542fbecd8539c092fe36155909b4812f73</id>
<content type='text'>
This is the start of some work from Roland Scheidegger to align
the X DDX pci ids and the drm ones, however we don't want to put
r300 ids in the kernel just yet, they destabilise a few machines.

From: Roland Scheidegger (via DRM CVS)
Signed-off-by: Dave Airlie &lt;airlied@linux.ie&gt;
</content>
</entry>
</feed>
