<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/x86/kernel/microcode_amd.c, branch docs-5.3</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-5.3</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-5.3'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/'/>
<updated>2014-01-13T19:00:12+00:00</updated>
<entry>
<title>x86, microcode: Move to a proper location</title>
<updated>2014-01-13T19:00:12+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2013-12-01T17:09:58+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=bad5fa631fca5466401cd4a48e30cc1f1cb6101e'/>
<id>urn:sha1:bad5fa631fca5466401cd4a48e30cc1f1cb6101e</id>
<content type='text'>
We've grown a bunch of microcode loader files all prefixed with
"microcode_". They should be under cpu/ because this is strictly
CPU-related functionality so do that and drop the prefix since they're
in their own directory now which gives that prefix. :)

While at it, drop MICROCODE_INTEL_LIB config item and stash the
functionality under CONFIG_MICROCODE_INTEL as it was its only user.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Tested-by: Aravind Gopalakrishnan &lt;Aravind.Gopalakrishnan@amd.com&gt;
</content>
</entry>
<entry>
<title>x86, microcode, AMD: Fix early ucode loading</title>
<updated>2014-01-13T18:59:38+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2013-11-29T13:58:44+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=5335ba5cf475369f88db8e6835764efdcad8ab96'/>
<id>urn:sha1:5335ba5cf475369f88db8e6835764efdcad8ab96</id>
<content type='text'>
The original idea to use the microcode cache for the APs doesn't pan out
because we do memory allocation there very early and with IRQs disabled
and we don't want to involve GFP_ATOMIC allocations. Not if it can be
helped.

Thus, extend the caching of the BSP patch approach to the APs and
iterate over the ucode in the initrd instead of using the cache. We
still save the relevant patches to it but later, right before we
jettison the initrd.

While at it, fix early ucode loading on 32-bit too.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Tested-by: Aravind Gopalakrishnan &lt;Aravind.Gopalakrishnan@amd.com&gt;
</content>
</entry>
<entry>
<title>x86/microcode/amd: Tone down printk(), don't treat a missing firmware file as an error</title>
<updated>2013-11-12T21:03:49+00:00</updated>
<author>
<name>Thomas Renninger</name>
<email>trenn@suse.de</email>
</author>
<published>2013-11-12T16:39:43+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=11f918d3e2d3861b6931e97b3aa778e4984935aa'/>
<id>urn:sha1:11f918d3e2d3861b6931e97b3aa778e4984935aa</id>
<content type='text'>
Do it the same way as done in microcode_intel.c: use pr_debug()
for missing firmware files.

There seem to be CPUs out there for which no microcode update
has been submitted to kernel-firmware repo yet resulting in
scary sounding error messages in dmesg:

  microcode: failed to load file amd-ucode/microcode_amd_fam16h.bin

Signed-off-by: Thomas Renninger &lt;trenn@suse.de&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: &lt;stable@kernel.org&gt;
Link: http://lkml.kernel.org/r/1384274383-43510-1-git-send-email-trenn@suse.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86/microcode/AMD: Fix patch level reporting for family 15h</title>
<updated>2013-09-27T07:29:27+00:00</updated>
<author>
<name>Suravee Suthikulpanit</name>
<email>suravee.suthikulpanit@amd.com</email>
</author>
<published>2010-09-30T00:27:12+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=accd1e823ed1d5980106dd522a4c535084400830'/>
<id>urn:sha1:accd1e823ed1d5980106dd522a4c535084400830</id>
<content type='text'>
On AMD family 14h, applying microcode patch on the a core (core0)
would also affect the other core (core1) in the same compute
unit. The driver would skip applying the patch on core1, but it
still need to update kernel structures to reflect the proper
patch level.

The current logic is not updating the struct
ucode_cpu_info.cpu_sig.rev of the skipped core. This causes the
/sys/devices/system/cpu/cpu1/microcode/version to report
incorrect patch level as shown below:

  $ grep . cpu?/microcode/version
  cpu0/microcode/version:0x600063d
  cpu1/microcode/version:0x6000626
  cpu2/microcode/version:0x600063d
  cpu3/microcode/version:0x6000626
  cpu4/microcode/version:0x600063d

Signed-off-by: Suravee Suthikulpanit &lt;suravee.suthikulpanit@amd.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: &lt;bp@alien8.de&gt;
Cc: &lt;jacob.w.shin@gmail.com&gt;
Cc: &lt;herrmann.der.user@googlemail.com&gt;
Link: http://lkml.kernel.org/r/1285806432-1995-1-git-send-email-suravee.suthikulpanit@amd.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86, microcode, AMD: Fix early microcode loading</title>
<updated>2013-08-12T16:32:45+00:00</updated>
<author>
<name>Torsten Kaiser</name>
<email>just.for.lkml@googlemail.com</email>
</author>
<published>2013-08-08T17:38:18+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=84516098b58e05821780dc0b89abcee434b4dca5'/>
<id>urn:sha1:84516098b58e05821780dc0b89abcee434b4dca5</id>
<content type='text'>
load_microcode_amd() (and the helper it is using) should not have an
cpu parameter. The microcode loading does not depend on the CPU wrt the
patches loaded since they will end up in a global list for all CPUs
anyway.

The change from cpu to x86family in load_microcode_amd()
now allows to drop the code messing with cpu_data(cpu) from
collect_cpu_info_amd_early(), which is wrong anyway because at that
point the per-cpu cpu_info is not yet setup (These values would later be
overwritten by smp_store_boot_cpu_info() / smp_store_cpu_info()).

Fold the rest of collect_cpu_info_amd_early() into load_ucode_amd_ap(),
because its only used at one place and without the cpuinfo_x86 accesses
it was not much left.

Signed-off-by: Torsten Kaiser &lt;just.for.lkml@googlemail.com&gt;
[ Fengguang: build fix ]
Signed-off-by: Fengguang Wu &lt;fengguang.wu@intel.com&gt;
[ Boris: adapt it to current tree. ]
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>x86, amd, microcode: Fix error path in apply_microcode_amd()</title>
<updated>2013-07-31T15:37:14+00:00</updated>
<author>
<name>Torsten Kaiser</name>
<email>just.for.lkml@googlemail.com</email>
</author>
<published>2013-07-23T20:58:23+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d982057f631df04f8d78321084a1a71ca51f3364'/>
<id>urn:sha1:d982057f631df04f8d78321084a1a71ca51f3364</id>
<content type='text'>
Return -1 (like Intels apply_microcode) when the loading fails, also
do not set the active microcode level on failure.

Signed-off-by: Torsten Kaiser &lt;just.for.lkml@googlemail.com&gt;
Link: http://lkml.kernel.org/r/20130723225823.2e4e7588@googlemail.com
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86, microcode, amd: Early microcode patch loading support for AMD</title>
<updated>2013-05-31T03:19:25+00:00</updated>
<author>
<name>Jacob Shin</name>
<email>jacob.shin@amd.com</email>
</author>
<published>2013-05-30T19:09:19+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=757885e94a22bcc82beb9b1445c95218cb20ceab'/>
<id>urn:sha1:757885e94a22bcc82beb9b1445c95218cb20ceab</id>
<content type='text'>
Add early microcode patch loading support for AMD.

Signed-off-by: Jacob Shin &lt;jacob.shin@amd.com&gt;
Link: http://lkml.kernel.org/r/1369940959-2077-5-git-send-email-jacob.shin@amd.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, microcode, amd: Refactor functions to prepare for early loading</title>
<updated>2013-05-31T03:19:25+00:00</updated>
<author>
<name>Jacob Shin</name>
<email>jacob.shin@amd.com</email>
</author>
<published>2013-05-30T19:09:18+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=a76096a6571d5389376753c2e18b30a9791fa072'/>
<id>urn:sha1:a76096a6571d5389376753c2e18b30a9791fa072</id>
<content type='text'>
In preparation work for early loading, refactor some common functions
that will be shared, and move some struct defines to a common header file.

Signed-off-by: Jacob Shin &lt;jacob.shin@amd.com&gt;
Link: http://lkml.kernel.org/r/1369940959-2077-4-git-send-email-jacob.shin@amd.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Fenghua Yu &lt;fenghua.yu@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, microcode, AMD: Add support for family 16h processors</title>
<updated>2012-11-21T06:23:28+00:00</updated>
<author>
<name>Boris Ostrovsky</name>
<email>boris.ostrovsky@amd.com</email>
</author>
<published>2012-11-15T18:41:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=36c46ca4f322a7bf89aad5462a3a1f61713edce7'/>
<id>urn:sha1:36c46ca4f322a7bf89aad5462a3a1f61713edce7</id>
<content type='text'>
Add valid patch size for family 16h processors.

[ hpa: promoting to urgent/stable since it is hw enabling and trivial ]

Signed-off-by: Boris Ostrovsky &lt;boris.ostrovsky@amd.com&gt;
Acked-by: Andreas Herrmann &lt;herrmann.der.user@googlemail.com&gt;
Link: http://lkml.kernel.org/r/1353004910-2204-1-git-send-email-boris.ostrovsky@amd.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
</content>
</entry>
<entry>
<title>x86, microcode_amd: Change email addresses, MAINTAINERS entry</title>
<updated>2012-10-30T09:05:52+00:00</updated>
<author>
<name>Andreas Herrmann</name>
<email>herrmann.der.user@googlemail.com</email>
</author>
<published>2012-10-29T17:51:38+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=943482d07e926128eed0482b879736f912c429e4'/>
<id>urn:sha1:943482d07e926128eed0482b879736f912c429e4</id>
<content type='text'>
Signed-off-by: Andreas Herrmann &lt;herrmann.der.user@googlemail.com&gt;
Cc: lm-sensors@lm-sensors.org
Cc: oprofile-list@lists.sf.net
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Cc: Robert Richter &lt;rric@kernel.org&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Jorg Roedel &lt;joro@8bytes.org&gt;
Cc: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Cc: Jean Delvare &lt;khali@linux-fr.org&gt;
Cc: Guenter Roeck &lt;linux@roeck-us.net&gt;
Link: http://lkml.kernel.org/r/20121029175138.GC5024@tweety
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
</feed>
