<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/sh/kernel/cpu/sh4a/setup-shx3.c, branch v4.4.12</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v4.4.12</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v4.4.12'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/'/>
<updated>2014-05-11T10:35:27+00:00</updated>
<entry>
<title>sh: Switch to new style TMU device</title>
<updated>2014-05-11T10:35:27+00:00</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart+renesas@ideasonboard.com</email>
</author>
<published>2014-04-23T11:15:15+00:00</published>
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<id>urn:sha1:1399c195ef5009bf44a41649da4718f6e67c0bff</id>
<content type='text'>
The TMU (Timer Unit) driver implements a new style of platform data that
handles the timer as a single device with multiple channel. Switch from
the old-style platform data to the new-style platform data.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>sh: Don't set plat_sci_port scbrr_algo_id field</title>
<updated>2013-12-24T12:49:43+00:00</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart+renesas@ideasonboard.com</email>
</author>
<published>2013-12-06T09:59:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d5917ef318b850fc72bd10db438580f7d1c406d9'/>
<id>urn:sha1:d5917ef318b850fc72bd10db438580f7d1c406d9</id>
<content type='text'>
The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>sh: Declare SCIF register base and IRQ as resources</title>
<updated>2013-12-24T12:49:43+00:00</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart+renesas@ideasonboard.com</email>
</author>
<published>2013-12-06T09:59:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d850acf975bee46e43c3cd80d2d287010195c63b'/>
<id>urn:sha1:d850acf975bee46e43c3cd80d2d287010195c63b</id>
<content type='text'>
Passing the register base address and IRQ through platform data is
deprecated. Use resources instead.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart+renesas@ideasonboard.com&gt;
Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>sh: intc: Kill off special reservation interface.</title>
<updated>2012-05-22T10:07:55+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2012-05-22T10:07:55+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=5f19f14fed7786652b9617c633db101d26a42251'/>
<id>urn:sha1:5f19f14fed7786652b9617c633db101d26a42251</id>
<content type='text'>
At present reserving the IRLs in the IRQ bitmap in addition to the
dropping of the legacy IRQ pre-allocation prevent IRL IRQs from being
allocated for the x3proto board.

The only reason to permit reservations was to lock down possible hardware
vectors prior to dynamic IRQ scanning, but this doesn't matter much given
that the hardware controller configuration is sorted before we get around
to doing any dynamic IRQ allocation anyways. Beyond that, all of the
tables are __init annotated, so quite a bit more work would need to be
done to support reconfiguring things like IRL controllers on the fly,
much more than would ever make it worth the hassle.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: sh-x3 evt2irq migration.</title>
<updated>2012-05-18T05:11:22+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2012-05-18T05:11:22+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d8be10bbf3ba7eb4f1a9e609813fcbf916472e2f'/>
<id>urn:sha1:d8be10bbf3ba7eb4f1a9e609813fcbf916472e2f</id>
<content type='text'>
Migrate SH-X3 to evt2irq() backed hwirq lookups.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6 into common/serial-rework</title>
<updated>2011-01-13T06:06:28+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2011-01-13T06:06:28+00:00</published>
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<id>urn:sha1:f43dc23d5ea91fca257be02138a255f02d98e806</id>
<content type='text'>
Conflicts:
	arch/sh/kernel/cpu/sh2/setup-sh7619.c
	arch/sh/kernel/cpu/sh2a/setup-mxg.c
	arch/sh/kernel/cpu/sh2a/setup-sh7201.c
	arch/sh/kernel/cpu/sh2a/setup-sh7203.c
	arch/sh/kernel/cpu/sh2a/setup-sh7206.c
	arch/sh/kernel/cpu/sh3/setup-sh7705.c
	arch/sh/kernel/cpu/sh3/setup-sh770x.c
	arch/sh/kernel/cpu/sh3/setup-sh7710.c
	arch/sh/kernel/cpu/sh3/setup-sh7720.c
	arch/sh/kernel/cpu/sh4/setup-sh4-202.c
	arch/sh/kernel/cpu/sh4/setup-sh7750.c
	arch/sh/kernel/cpu/sh4/setup-sh7760.c
	arch/sh/kernel/cpu/sh4a/setup-sh7343.c
	arch/sh/kernel/cpu/sh4a/setup-sh7366.c
	arch/sh/kernel/cpu/sh4a/setup-sh7722.c
	arch/sh/kernel/cpu/sh4a/setup-sh7723.c
	arch/sh/kernel/cpu/sh4a/setup-sh7724.c
	arch/sh/kernel/cpu/sh4a/setup-sh7763.c
	arch/sh/kernel/cpu/sh4a/setup-sh7770.c
	arch/sh/kernel/cpu/sh4a/setup-sh7780.c
	arch/sh/kernel/cpu/sh4a/setup-sh7785.c
	arch/sh/kernel/cpu/sh4a/setup-sh7786.c
	arch/sh/kernel/cpu/sh4a/setup-shx3.c
	arch/sh/kernel/cpu/sh5/setup-sh5.c
	drivers/serial/sh-sci.c
	drivers/serial/sh-sci.h
	include/linux/serial_sci.h
</content>
</entry>
<entry>
<title>sh: Support early IRQ vector map reservation for delayed controllers.</title>
<updated>2010-10-02T13:02:07+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-10-02T13:02:07+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=4bacd796ccd6976b03dd490708a1abc291d5521e'/>
<id>urn:sha1:4bacd796ccd6976b03dd490708a1abc291d5521e</id>
<content type='text'>
Some controllers will need to be initialized lazily due to pinmux
constraints, while others may simply have no need to be brought online if
there are no backing devices for them attached. In this case it's still
necessary to be able to reserve their hardware vector map before dynamic
IRQs get a hold of them.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Handle pinmux for SH-X3 proto IRQ/IRL modes.</title>
<updated>2010-10-02T10:43:40+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-10-02T10:43:40+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=742759eae6b58a172d8f79ff0938d1e25dc9abc5'/>
<id>urn:sha1:742759eae6b58a172d8f79ff0938d1e25dc9abc5</id>
<content type='text'>
The SH-X3 proto CPU has all of the external IRQ and IRL pins muxed, make
sure that we're able to grab them before attempting to register their
respective IRQ controllers.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Support IRQ balancing for SH-X3 proto cores, too.</title>
<updated>2010-10-01T16:04:30+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-10-01T16:04:30+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=f9d885c3e59e50863565bddd2672656b57b15035'/>
<id>urn:sha1:f9d885c3e59e50863565bddd2672656b57b15035</id>
<content type='text'>
This adds in hardware IRQ auto-distribution support for SH-X3 proto CPUs,
following the SH7786 support.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Kill off timer clock strings for legacy CPG parts.</title>
<updated>2010-03-29T08:25:03+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-03-29T08:25:03+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=4dc50a068ad8fbbd2dd6dd5ac8ac2652589ba046'/>
<id>urn:sha1:4dc50a068ad8fbbd2dd6dd5ac8ac2652589ba046</id>
<content type='text'>
Now with the lookup aliases in place there is no longer any need to
provide the clock string, kill it off for all legacy CPG CPUs.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
</feed>
