lwn.git/arch/parisc/kernel/inventory.c, branch docs-mw

Convert 'alloc_obj' family to use the new default GFP_KERNEL argument

2026-02-22T01:09:51+00:00

This was done entirely with mindless brute force, using git grep -l '\

treewide: Replace kmalloc with kmalloc_obj for non-scalar types

2026-02-21T09:02:28+00:00

This is the result of running the Coccinelle script from scripts/coccinelle/api/kmalloc_objs.cocci. The script is designed to avoid scalar types (which need careful case-by-case checking), and instead replace kmalloc-family calls that allocate struct or union object instances: Single allocations: kmalloc(sizeof(TYPE), ...) are replaced with: kmalloc_obj(TYPE, ...) Array allocations: kmalloc_array(COUNT, sizeof(TYPE), ...) are replaced with: kmalloc_objs(TYPE, COUNT, ...) Flex array allocations: kmalloc(struct_size(PTR, FAM, COUNT), ...) are replaced with: kmalloc_flex(*PTR, FAM, COUNT, ...) (where TYPE may also be *VAR) The resulting allocations no longer return "void *", instead returning "TYPE *". Signed-off-by: Kees Cook

parisc: Enhance debug code for PAT firmware

2026-02-06T23:45:19+00:00

Enhance output when running PAT firmware, which is helpful when developing the QEMU emulator. The added code is behind an ifdef, so no performance overhead for normal kernels. Signed-off-by: Helge Deller

parisc: Add qemu fw_cfg interface

2020-10-15T06:10:37+00:00

When running on qemu, SeaBIOS-hppa stores the iomem address for the emulated fw_cfg port in PAGE0_>pad0[2/3]. Let the Linux driver auto-configure the fw_cfg interface with it, so that the fw_cfg info shows up in /sys/firmware/qemu_fw_cfg. Signed-off-by: Helge Deller

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32+00:00

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

parisc: Use __ro_after_init in inventory.c

2019-05-10T19:00:44+00:00

Signed-off-by: Helge Deller

parisc: Use per-pagetable spinlock

2019-05-03T21:47:41+00:00

PA-RISC uses a global spinlock to protect pagetable updates in the TLB fault handlers. When multiple cores are taking TLB faults simultaneously, the cache line containing the spinlock becomes a bottleneck. This patch embeds the spinlock in the top level page directory, so that every process has its own lock. It improves performance by 30% when doing parallel compilations. At least on the N class systems, only one PxTLB inter processor broadcast can be active at any one time on the Merced bus. If a Merced bus is found, this patch serializes the TLB flushes with the pa_tlb_flush_lock spinlock. v1: Initial patch by Mikulas v2: Added Merced detection by Helge v3: Revised TLB serialization by Dave & Helge Signed-off-by: Mikulas Patocka Signed-off-by: John David Anglin Signed-off-by: Helge Deller

parisc: Retrieve and display the PDC PAT capabilities

2018-10-20T19:10:37+00:00

Signed-off-by: Helge Deller

parisc: Add Page Deallocation Table (PDT) support

2017-05-12T07:14:15+00:00

The firmare in most parisc machines maintains a Page Deallocation Table (PDT) which holds a list of physical memory addresses where hardware detected memory errors (single bit and double bit errors). This patch adds the missing PDC firmware calls and the logic to read the PDT from firmware, report all current PDT entries and exclude the reported bad memory from being used by Linux. Signed-off-by: Helge Deller

parisc: Enhance CPU detection code on PAT machines

2016-12-12T21:28:09+00:00

This patch fixes the debug code which runs during the inventory scan on machines with PAT firmware. Additionally print out the relationship between the detected logical CPU number and it's physical location and physical cpu number. This leads to information which can be used to feed numa-structures in the kernel in later patches. An example output is from my single-CPU (2 cores) C8000 machine is: Logical CPU #0 is physical cpu #0 at 0xffff0000ffff15, hpa 0xfffffffffe780000 Logical CPU #1 is physical cpu #1 at 0xffff0000ffff15, hpa 0xfffffffffe781000 Signed-off-by: Helge Deller