lwn.git/arch/mn10300/mm/misalignment.c, branch v4.6.3

Disintegrate asm/system.h for MN10300

2012-03-28T17:30:02+00:00

Disintegrate asm/system.h for MN10300. Signed-off-by: David Howells cc: linux-am33-list@redhat.com

atomic: use

2011-07-26T23:49:47+00:00

This allows us to move duplicated code in (atomic_inc_not_zero() for now) to Signed-off-by: Arun Sharma Reviewed-by: Eric Dumazet Cc: Ingo Molnar Cc: David Miller Cc: Eric Dumazet Acked-by: Mike Frysinger Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

MN10300: BUG to BUG_ON changes

2010-10-27T16:28:33+00:00

Signed-off-by: Stoyan Gaydarov Signed-off-by: David Howells

mn10300: add cc clobbers to asm statements

2010-01-11T17:34:10+00:00

gcc 4.2.1 for MN10300 is more agressive than the older gcc in reordering/moving other insns between an insn that sets flags and an insn that uses those flags. This leads to trouble with asm statements which are missing an explicit "cc" clobber. This patch adds the explicit "cc" clobber to asm statements which do indeed clobber the condition flags. Signed-off-by: Mark Salter Signed-off-by: David Howells Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

headers: smp_lock.h redux

2009-07-12T19:22:34+00:00

* Remove smp_lock.h from files which don't need it (including some headers!) * Add smp_lock.h to files which do need it * Make smp_lock.h include conditional in hardirq.h It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT This will make hardirq.h inclusion cheaper for every PREEMPT=n config (which includes allmodconfig/allyesconfig, BTW) Signed-off-by: Alexey Dobriyan Signed-off-by: Linus Torvalds

MN10300: Don't do misalignment handling for userspace

2008-11-12T18:41:18+00:00

Don't do misalignment handling for userspace misalignment faults: just generate an appropriate SIGBUS instead. Signed-off-by: David Howells Signed-off-by: Linus Torvalds

MN10300: Don't handle misaligned loading and storing of SP

2008-11-12T18:41:18+00:00

Don't handle the misaligned loading and storing of the SP register as in C code that's most certainly a compiler bug. Signed-off-by: David Howells Signed-off-by: Linus Torvalds

MN10300: Handle misaligned SP-based operands

2008-11-12T18:41:18+00:00

Support misalignment handling for instructions that have kernel SP-based address operands, including fixing those that include IMM8 or IMM16 displacements. Signed-off-by: David Howells Signed-off-by: Linus Torvalds

MN10300: Fix misaligned index-register addressing handling

2008-11-12T18:41:17+00:00

Fix misalignment handling for an address calculated from the sum of two registers. Signed-off-by: David Howells Signed-off-by: Linus Torvalds

MN10300: Handle misaligned postinc-with-imm addressing mode correctly

2008-11-12T18:41:17+00:00

Correctly handle misalignment in MOV instructions with postinc-with-immediate addressing mode operands. In these, the immediate value is the increment to be applied the address register, not the displacement to the address. Signed-off-by: David Howells Signed-off-by: Linus Torvalds