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<title>lwn.git/arch/mips/jz4740, branch master</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
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<updated>2020-09-18T14:35:05+00:00</updated>
<entry>
<title>MIPS: jz4740: Rename jz4740 folders to ingenic</title>
<updated>2020-09-18T14:35:05+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-09-06T19:29:33+00:00</published>
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<id>urn:sha1:a103e9b951f9094792fd0dab0a0dcd1b3408825a</id>
<content type='text'>
Now that all the jz4740 platform code has been removed, and we're left
with only a Kconfig and the cpu-feature-overrides.h file, finalize the
cleanup process by renaming the jz4740 and include/mach-jz4740 folders
to ingenic and include/mach-ingenic.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: jz4740: Drop all obsolete files</title>
<updated>2020-09-18T14:34:32+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-09-06T19:29:32+00:00</published>
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<id>urn:sha1:b4a30e9c7480603a02d8ad788975428b9c6dc876</id>
<content type='text'>
Support for Ingenic SoCs is now provided by the arch/mips/generic/ code,
so all files in the arch/mips/jz4740/ folder can dropped, except for the
Kconfig, and the cpu-feature-overrides.h header file.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: generic: Add support for Ingenic SoCs</title>
<updated>2020-09-18T14:33:59+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-09-06T19:29:31+00:00</published>
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<id>urn:sha1:f0f4a753079c636d5d43a102edbde0dad1e7de51</id>
<content type='text'>
Add support for Ingenic SoCs in arch/mips/generic/.

The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: ingenic: Hardcode mem size for qi,lb60 board</title>
<updated>2020-07-31T15:48:57+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-07-30T16:12:33+00:00</published>
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<id>urn:sha1:48f5dd56cf2980ff932c6fd98ff5a2c503cde97b</id>
<content type='text'>
Old Device Tree for the qi,lb60 (aka. Ben Nanonote) did not have a
'memory' node. The kernel would then read the memory controller
registers to know how much RAM was available.

Since every other supported board has had a 'memory' node from the
beginning, we can just hardcode a RAM size of 32 MiB when running with
an old Device Tree without the 'memory' node.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB</title>
<updated>2020-07-31T15:48:19+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-07-30T16:12:31+00:00</published>
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<id>urn:sha1:199c5f080ed695c4b01236e06743a28952403d17</id>
<content type='text'>
The fw_passed_dtb is now properly initialized even when
CONFIG_BUILTIN_DTB is used, so there's no need to handle it in any
particular way here.

Note that the behaviour is slightly different, as the previous code used
the built-in Device Tree unconditionally, while now the built-in Device
Tree is only used when the bootloader did not provide one.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: X2000: Add X2000 system type.</title>
<updated>2020-07-24T09:13:57+00:00</updated>
<author>
<name>周琰杰 (Zhou Yanjie)</name>
<email>zhouyanjie@wanyeetech.com</email>
</author>
<published>2020-07-22T05:21:19+00:00</published>
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<id>urn:sha1:0d10d17bac3d5d4e97d6f008aa3c329a83d3b283</id>
<content type='text'>
1.Add "PRID_COMP_INGENIC_13" and "PRID_IMP_XBURST2" for X2000.
2.Add X2000 system type for cat /proc/cpuinfo to give out X2000.

Signed-off-by: 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Ingenic: Add YSH &amp; ATIL CU Neo board support.</title>
<updated>2020-07-16T08:57:44+00:00</updated>
<author>
<name>周琰杰 (Zhou Yanjie)</name>
<email>zhouyanjie@wanyeetech.com</email>
</author>
<published>2020-07-14T05:32:27+00:00</published>
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<id>urn:sha1:56d47fbbb7b4c3cf704c6ea61d6c1adf8667f43e</id>
<content type='text'>
Add a device tree and a defconfig for the Ingenic X1830 based
YSH &amp; ATIL CU Neo board.

Tested-by: 周正 (Zhou Zheng) &lt;sernia.zhou@foxmail.com&gt;
Signed-off-by: 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Ingenic: Add Ingenic X1830 support.</title>
<updated>2020-07-16T08:54:26+00:00</updated>
<author>
<name>周琰杰 (Zhou Yanjie)</name>
<email>zhouyanjie@wanyeetech.com</email>
</author>
<published>2020-07-14T05:32:25+00:00</published>
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<id>urn:sha1:63970c291d6cf50e93a3557695d6e6fc4ba323e6</id>
<content type='text'>
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1830 based board is
added in a later commit.

Tested-by: 周正 (Zhou Zheng) &lt;sernia.zhou@foxmail.com&gt;
Signed-off-by: 周琰杰 (Zhou Yanjie) &lt;zhouyanjie@wanyeetech.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: ingenic: Add support for the RS90 board</title>
<updated>2020-07-16T08:48:09+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-06-23T18:24:31+00:00</published>
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<id>urn:sha1:ac6b13814f7af6981fb718fad8cf83199cd98dad</id>
<content type='text'>
The RS-90, better known as RetroMini, is a small and pocketable handheld
gaming console from YLMChina. It has little more than a JZ4725B SoC, a
NAND, a screen, some buttons and a speaker.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: ingenic: Add support for the JZ4725B SoC</title>
<updated>2020-07-16T08:47:50+00:00</updated>
<author>
<name>Paul Cercueil</name>
<email>paul@crapouillou.net</email>
</author>
<published>2020-06-23T18:24:30+00:00</published>
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<id>urn:sha1:c211ab5f5e6e304aee43bb5ef6919fbe4e41ef64</id>
<content type='text'>
Add preliminary support for boards based on the JZ4725B SoC from
Ingenic.

The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its
internals are much closer to what can be found on the JZ4750 and newer
SoCs.

It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU.

Signed-off-by: Paul Cercueil &lt;paul@crapouillou.net&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
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