lwn.git/arch/mips/include/asm/pci.h, branch v6.7-rc4

PCI: Remove pci_get_legacy_ide_irq() and asm-generic/pci.h

2022-07-22T22:23:45+00:00

pci_get_legacy_ide_irq() is only used on platforms that support PNP, so many architectures define it but never use it. Replace uses of it with ATA_PRIMARY_IRQ() and ATA_SECONDARY_IRQ(), which provide the same functionality. Since pci_get_legacy_ide_irq() is no longer used, remove all the architecture-specific definitions of it as well as asm-generic/pci.h, which only provides pci_get_legacy_ide_irq() [bhelgaas: commit log] Co-developed-by: Arnd Bergmann Link: https://lore.kernel.org/r/20220722214944.831438-2-shorne@gmail.com Signed-off-by: Arnd Bergmann Signed-off-by: Stafford Horne Signed-off-by: Bjorn Helgaas Reviewed-by: Christoph Hellwig Acked-by: Geert Uytterhoeven Acked-by: Pierre Morel Acked-by: Rafael J. Wysocki

MIPS: Only define pci_remap_iospace() for Ralink

2021-12-09T09:22:24+00:00

After commit 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'"), there exists the following warning on the Loongson64 platform: loongson-pci 1a000000.pci: IO 0x0018020000..0x001803ffff -> 0x0000020000 loongson-pci 1a000000.pci: MEM 0x0040000000..0x007fffffff -> 0x0040000000 ------------[ cut here ]------------ WARNING: CPU: 2 PID: 1 at arch/mips/pci/pci-generic.c:55 pci_remap_iospace+0x84/0x90 resource start address is not zero ... Call Trace: [] show_stack+0x40/0x120 [] dump_stack_lvl+0x58/0x74 [] __warn+0xe0/0x110 [] warn_slowpath_fmt+0xa4/0xd0 [] pci_remap_iospace+0x84/0x90 [] devm_pci_remap_iospace+0x5c/0xb8 [] devm_of_pci_bridge_init+0x178/0x1f8 [] devm_pci_alloc_host_bridge+0x78/0x98 [] loongson_pci_probe+0x34/0x160 [] platform_probe+0x6c/0xe0 [] really_probe+0xbc/0x340 [] __driver_probe_device+0x98/0x110 [] driver_probe_device+0x50/0x118 [] __driver_attach+0x80/0x118 [] bus_for_each_dev+0x80/0xc8 [] bus_add_driver+0x130/0x210 [] driver_register+0x8c/0x150 [] do_one_initcall+0x54/0x288 [] kernel_init_freeable+0x27c/0x2e4 [] kernel_init+0x2c/0x134 [] ret_from_kernel_thread+0x14/0x1c ---[ end trace e4a0efe10aa5cce6 ]--- loongson-pci 1a000000.pci: error -19: failed to map resource [io 0x20000-0x3ffff] We can see that the resource start address is 0x0000020000, because the ISA Bridge used the zero address which is defined in the dts file arch/mips/boot/dts/loongson/ls7a-pch.dtsi: ISA Bridge: /bus@10000000/isa@18000000 IO 0x0000000018000000..0x000000001801ffff -> 0x0000000000000000 Based on the above analysis, the architecture-specific pci_remap_iospace() is not suitable for Loongson64, we should only define pci_remap_iospace() for Ralink on MIPS based on the commit background. Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'") Suggested-by: Thomas Bogendoerfer Signed-off-by: Tiezhu Yang Tested-by: Sergio Paracuellos Acked-by: Sergio Paracuellos Signed-off-by: Thomas Bogendoerfer

MIPS: asm: pci: define arch-specific 'pci_remap_iospace()' dependent on 'CONFIG_PCI_DRIVERS_GENERIC'

2021-10-09T08:37:21+00:00

Some MIPS defconfigs that don't define 'CONFIG_PCI_DRIVERS_GENERIC' but define 'CONFIG_PCI_DRIVERS_LEGACY' or none of them, can fail when they are built since definition for 'pci_remap_iospace' is being done in include file 'arch/mips/include/asm/pci.h' and the specific function implemented in 'arch/mips/pci/pci-generic.c'. MIPS PCI drivers that don't use generic PCI core APIs don't really need 'pci_remap_iospace' to be defined at all. Hence, change definition for 'pci_remap_iospace' to be dependent on the preprocessor 'CONFIG_PCI_DRIVERS_GENERIC' definition to avoid possible build problems. Fixes: 9f76779f2418 ("MIPS: implement architecture-specific 'pci_remap_iospace()'") CC: Thomas Bogendoerfer Reported-by: Stephen Rothwell Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20211008095311.26475-1-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

MIPS: implement architecture-specific 'pci_remap_iospace()'

2021-10-05T10:36:25+00:00

To make PCI IO work we need to properly virtually map IO cpu physical address and set this virtual address as the address of the first PCI IO port which is set using function 'set_io_port_base()'. Acked-by: Arnd Bergmann Acked-by: Thomas Bogendoerfer Signed-off-by: Sergio Paracuellos Link: https://lore.kernel.org/r/20210925203224.10419-6-sergio.paracuellos@gmail.com Signed-off-by: Greg Kroah-Hartman

MIPS: pci-legacy: remove busn_resource field

2021-04-16T07:15:40+00:00

No drivers set the busn_resource field in the pci_controller struct. Commit 7ee214b540d9 ("MIPS: PCI: Remove unused busn_offset") almost removed it over 3 years ago. Remove it for good to free up memory and eliminate messages like: pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0] Signed-off-by: Ilya Lipnitskiy Cc: Bjorn Helgaas Signed-off-by: Thomas Bogendoerfer

PCI: Convert pci_resource_to_user() to a weak function

2019-08-08T20:12:07+00:00

Convert pci_resource_to_user() to a weak function so the existing architecture-specific implementations will automatically override the generic one. This allows us to remove HAVE_ARCH_PCI_RESOURCE_TO_USER definitions and avoid the conditional compilation for this single function. Link: https://lore.kernel.org/r/20190729101401.28068-1-efremov@linux.com Link: https://lore.kernel.org/r/20190729101401.28068-2-efremov@linux.com Link: https://lore.kernel.org/r/20190729101401.28068-3-efremov@linux.com Link: https://lore.kernel.org/r/20190729101401.28068-4-efremov@linux.com Link: https://lore.kernel.org/r/20190729101401.28068-5-efremov@linux.com Link: https://lore.kernel.org/r/20190729101401.28068-6-efremov@linux.com Signed-off-by: Denis Efremov [bhelgaas: squash into one commit] Signed-off-by: Bjorn Helgaas Acked-by: Paul Burton # MIPS

PCI: remove PCI_DMA_BUS_IS_PHYS

2018-05-07T05:15:41+00:00

This was used by the ide, scsi and networking code in the past to determine if they should bounce payloads. Now that the dma mapping always have to support dma to all physical memory (thanks to swiotlb for non-iommu systems) there is no need to this crude hack any more. Signed-off-by: Christoph Hellwig Acked-by: Palmer Dabbelt (for riscv) Reviewed-by: Jens Axboe

PCI: Remove redundant pci_dev, pci_bus, resource declarations

2017-11-08T00:38:48+00:00

defines struct pci_bus and struct pci_dev and includes the struct resource definition before including . Nobody includes directly, so they don't need their own declarations. Remove the redundant struct pci_dev, pci_bus, resource declarations. Signed-off-by: Bjorn Helgaas Reviewed-by: Ingo Molnar Acked-by: Jesper Nilsson # CRIS Acked-by: Ralf Baechle # MIPS

PCI: Remove redundant pcibios_set_master() declarations

2017-11-08T00:38:47+00:00

All users of pcibios_set_master() include , which already has a declaration. Remove the unnecessary declarations from the files. Signed-off-by: Bjorn Helgaas Reviewed-by: Thomas Gleixner Reviewed-by: Ingo Molnar Acked-by: Jesper Nilsson # CRIS Acked-by: Ralf Baechle # MIPS

MIPS: PCI: Remove unused busn_offset

2017-05-18T20:39:19+00:00

pci_add_resource_offset() is for host bridge windows where the bridge translates CPU addresses to PCI bus addresses by adding an offset. To my knowledge, no host bridge translates bus numbers, so this is only useful for MEM and IO windows. In any event, host->busn_offset is never set to anything other than zero, so pci_add_resource() is sufficient. a2e50f53d535 ("MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controller") also added busn_resource itself. This is currently unused but may be used by future SGI IP27 fixes, so I left it there. Tested-by: Joshua Kinard # SGI IP30 and IP27 Signed-off-by: Bjorn Helgaas Acked-by: Joshua Kinard