<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/m68k/include/asm/m5206sim.h, branch v3.10.33</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v3.10.33</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v3.10.33'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/'/>
<updated>2012-09-27T13:33:51+00:00</updated>
<entry>
<title>m68knommu: make ColdFire Chip Select register definitions absolute addresses</title>
<updated>2012-09-27T13:33:51+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-09-14T05:36:02+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=1419ea3b34db3e3cf5d6bedb3f913ed814022030'/>
<id>urn:sha1:1419ea3b34db3e3cf5d6bedb3f913ed814022030</id>
<content type='text'>
Make all definitions of the ColdFire Chip Select registers absolute addresses.
Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire Interrupt Source register definitions absolute addresses</title>
<updated>2012-09-27T13:33:50+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-08-17T06:48:16+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=c986a3d520395604ca29a7fb9fca60a455abcc44'/>
<id>urn:sha1:c986a3d520395604ca29a7fb9fca60a455abcc44</id>
<content type='text'>
Make all definitions of the ColdFire Interrupt Source registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire Pin Assignment register definitions absolute addresses</title>
<updated>2012-09-27T13:33:49+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-08-17T06:20:23+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=a45f56b272e59527e41d7fbfc9b49dac9b90644c'/>
<id>urn:sha1:a45f56b272e59527e41d7fbfc9b49dac9b90644c</id>
<content type='text'>
Make all definitions of the ColdFire Pin Assignment registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire watchdog register definitions absolute addresses</title>
<updated>2012-09-27T13:33:48+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-07-15T12:01:08+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=660b73e356a63d67231aab49d23e83b1a5a9ec87'/>
<id>urn:sha1:660b73e356a63d67231aab49d23e83b1a5a9ec87</id>
<content type='text'>
Make all definitions of the ColdFire Software watchdog registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire SYPCR and RSR register definitions absolute addresses</title>
<updated>2012-09-27T13:33:47+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-07-15T11:55:01+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=e1e362dc074c2981e7f78d26bf38a4f14be52ecd'/>
<id>urn:sha1:e1e362dc074c2981e7f78d26bf38a4f14be52ecd</id>
<content type='text'>
Make all definitions of the ColdFire Reset and System registers absolute
addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the abolsute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire IMR and IPR register definitions absolute addresses</title>
<updated>2012-09-27T13:33:46+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2012-07-15T11:42:47+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=6a3a786d02172b34d0ffba6f80bd1150da51125d'/>
<id>urn:sha1:6a3a786d02172b34d0ffba6f80bd1150da51125d</id>
<content type='text'>
Make all definitions of the ColdFire Interrupt Mask and Pending registers
absolute addresses. Currently some are relative to the MBAR peripheral region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make 5206 UART platform addressing consistent</title>
<updated>2012-03-04T23:43:05+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-12-23T14:10:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=8400ca322e2fb6771d2adfc05a745b8872af038d'/>
<id>urn:sha1:8400ca322e2fb6771d2adfc05a745b8872af038d</id>
<content type='text'>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.

So modify the ColdFire 5206 UART addressing so that:

. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: remove ColdFire CLOCK_DIV config option</title>
<updated>2011-03-15T11:01:57+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-03-09T04:19:08+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=ce3de78a1c9504dba1781e47613b397e4028ae2b'/>
<id>urn:sha1:ce3de78a1c9504dba1781e47613b397e4028ae2b</id>
<content type='text'>
The reality is that you do not need the abiltity to configure the
clock divider for ColdFire CPUs. It is a fixed ratio on any given
ColdFire family member. It is not the same for all ColdFire parts,
but it is always the same in a model range. So hard define the divider
for each supported ColdFire CPU type and remove the Kconfig option.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: clean up use of MBAR for DRAM registers on ColdFire start</title>
<updated>2011-03-15T11:01:55+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-03-06T13:01:46+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=6a92e1982d5c538d1cfafbe4b0cb16d49306854f'/>
<id>urn:sha1:6a92e1982d5c538d1cfafbe4b0cb16d49306854f</id>
<content type='text'>
In some of the RAM size autodetection code on ColdFire CPU startup
we reference DRAM registers relative to the MBAR register. Not all of
the supported ColdFire CPUs have an MBAR, and currently this works
because we fake an MBAR address on those registers. In an effort to
clean this up, and eventually remove the fake MBAR setting make the
DRAM register address definitions actually contain the MBAR (or IPSBAR
as appropriate) value as required.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: remove use of MBAR in old-style ColdFire timer</title>
<updated>2011-03-15T11:01:54+00:00</updated>
<author>
<name>Greg Ungerer</name>
<email>gerg@uclinux.org</email>
</author>
<published>2011-03-08T23:57:14+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=58f0ac98f386d2b335e5852e8feec828c43a0e13'/>
<id>urn:sha1:58f0ac98f386d2b335e5852e8feec828c43a0e13</id>
<content type='text'>
Not all ColdFire CPUs that use the old style timer hardware module use
an MBAR set peripheral region. Move the TIMER base address defines to the
per-CPU header files where we can set it correctly based on how the
peripherals are mapped - instead of using a fake MBAR for some platforms.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
</feed>
