<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi, branch docs-next</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-next</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-next'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/'/>
<updated>2025-02-21T15:23:01+00:00</updated>
<entry>
<title>arm64: dts: renesas: rcar: Add boot phase tags</title>
<updated>2025-02-21T15:23:01+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-02-09T18:05:05+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=399f14ff6625cbfb666c4372a469714f840f7df3'/>
<id>urn:sha1:399f14ff6625cbfb666c4372a469714f840f7df3</id>
<content type='text'>
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.  Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car SoCs.

All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.

Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/20250209180616.160253-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQ</title>
<updated>2024-11-03T11:27:45+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-10-18T08:39:55+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=8219a455efd4ba11c1d30c1bbc9ce853466c19bf'/>
<id>urn:sha1:8219a455efd4ba11c1d30c1bbc9ce853466c19bf</id>
<content type='text'>
When the DSI to eDP bridge was added, pin control for the IRQ pin was
left out, because the pin controller did not support INTC-EX pins yet.

Commit 10544ec1b3436037 ("pinctrl: renesas: r8a779g0: Add INTC-EX
pins, groups, and function") added support for these pins, so add the
missing pin control description.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/89bab2008891be1f003a3c0dbcdf36af3b98da70.1729240573.git.geert+renesas@glider.be
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Use interrupts-extended for I/O expanders</title>
<updated>2024-10-14T08:16:16+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-10-04T12:52:56+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=ecc5bfdbe74b79555258594b3cf4d5daf56f827e'/>
<id>urn:sha1:ecc5bfdbe74b79555258594b3cf4d5daf56f827e</id>
<content type='text'>
Use the more concise interrupts-extended property to fully describe the
interrupts.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/8409a184db92b8d03d95beffde2cc9a9752366a9.1728045620.git.geert+renesas@glider.be
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Use interrupts-extended for Ethernet PHYs</title>
<updated>2024-10-14T08:16:16+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-10-04T12:52:54+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=ba4d843a2ac646abc034b013c0722630f6ea1c90'/>
<id>urn:sha1:ba4d843a2ac646abc034b013c0722630f6ea1c90</id>
<content type='text'>
Use the more concise interrupts-extended property to fully describe the
interrupts.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Tested-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt; # G2L family and G3S
Link: https://lore.kernel.org/e9db8758d275ec63b0d6ce086ac3d0ea62966865.1728045620.git.geert+renesas@glider.be
</content>
</entry>
<entry>
<title>arm64: dts: renesas: Use interrupts-extended for DisplayPort bridges</title>
<updated>2024-10-14T08:16:16+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-10-04T12:52:53+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=660129993aba857a5947d45664b78354286b50dd'/>
<id>urn:sha1:660129993aba857a5947d45664b78354286b50dd</id>
<content type='text'>
Use the more concise interrupts-extended property to fully describe the
interrupts.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Link: https://lore.kernel.org/2b217486221d90eb3c127f5e44f9c886161ab8c6.1728045620.git.geert+renesas@glider.be
</content>
</entry>
<entry>
<title>arm64: dts: renesas: rcar-gen4: Switch PCIe to reset-gpios</title>
<updated>2024-10-01T12:19:29+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-09-27T11:58:38+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=25e289d0622a40a76a1bb1d5972d250bf746f8bf'/>
<id>urn:sha1:25e289d0622a40a76a1bb1d5972d250bf746f8bf</id>
<content type='text'>
Commit 42694f9f6407a933 ("dt-bindings: PCI: add snps,dw-pcie.yaml")
deprecated the "reset-gpio" property in favor of "reset-gpios".
Hence replace the "reset-gpio" property by "reset-gpios" in PCIe device
nodes.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Link: https://lore.kernel.org/853019acdfcdf05fcb46d8124157ef298da55188.1727438172.git.geert+renesas@glider.be
</content>
</entry>
<entry>
<title>arm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0</title>
<updated>2024-08-23T13:52:45+00:00</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2024-08-22T00:44:54+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=6ca537aa160ffd2f41cca4af72aeed18c9d41b82'/>
<id>urn:sha1:6ca537aa160ffd2f41cca4af72aeed18c9d41b82</id>
<content type='text'>
Enable PCIe Host controller channel 0 on R-Car V4H White Hawk boards.

Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/20240822004454.1087582-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: white-hawk-cpu: Add aliases for I2C buses</title>
<updated>2024-05-28T09:51:25+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2024-05-23T20:50:38+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=e9e6ed5a220f59a298db39b861500a6aea66e528'/>
<id>urn:sha1:e9e6ed5a220f59a298db39b861500a6aea66e528</id>
<content type='text'>
They are numbered like this in the schematics, so keep the names in
Linux the same.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20240523205041.7356-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: r8a779g0: Use MDIO node for all AVB devices</title>
<updated>2024-05-28T07:32:21+00:00</updated>
<author>
<name>Niklas Söderlund</name>
<email>niklas.soderlund+renesas@ragnatech.se</email>
</author>
<published>2024-04-13T14:18:05+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=54bf0c27380b95a220b94ea835b5e8bf58baded9'/>
<id>urn:sha1:54bf0c27380b95a220b94ea835b5e8bf58baded9</id>
<content type='text'>
Switch from defining the PHY inside the AVB node itself and create a
dedicated MDIO node for AVB0, the only AVB describing a PHY.  This is
needed as adding PHYs to AVB1 and AVB2 will require setting MDIO bus
parameters and thus requires a dedicated node.

Signed-off-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20240413141806.300989-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>arm64: dts: renesas: white-hawk-cpu: Factor out common parts</title>
<updated>2024-01-29T13:22:26+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2024-01-25T14:48:56+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=b84bd2230a58e5c208ac3ebe75047179e7441866'/>
<id>urn:sha1:b84bd2230a58e5c208ac3ebe75047179e7441866</id>
<content type='text'>
Factor out the parts on the White Hawk CPU board that are also present
on the White Hawk Single board, so they can be reused when introducing
support for the latter.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Link: https://lore.kernel.org/r/50676e7e9ac1c50ab450c030481f60ece4c3947e.1706192990.git.geert+renesas@glider.be
</content>
</entry>
</feed>
