lwn.git/arch/arm64/boot/dts/qcom/milos.dtsi, branch master

arm64: dts: qcom: milos: Add power-domain and iface clk for ice node

2026-05-21T21:29:07+00:00

Qualcomm in-line crypto engine (ICE) platform driver specifies and votes for its own resources. Before accessing ICE hardware during probe, to avoid potential unclocked register access issues (when clk_ignore_unused is not passed on the kernel command line), in addition to the 'core' clock the 'iface' clock should also be turned on by the driver. This can only be done if the UFS_PHY_GDSC power domain is enabled. Specify both the UFS_PHY_GDSC power domain and the 'iface' clock in the ICE node for milos. Fixes: 04bb37433330e ("arm64: dts: qcom: milos: Add UFS nodes") Signed-off-by: Harshal Dev Reviewed-by: Konrad Dybcio Reviewed-by: Kuldeep Singh Link: https://lore.kernel.org/r/20260416-qcom_ice_power_and_clk_vote-v5-12-5ccf5d7e2846@oss.qualcomm.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Add CCI busses

2026-03-30T13:59:19+00:00

Add the nodes and the pinctrl for the CCI I2C busses on the Milos SoC. Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20260320-milos-cci-v2-2-1947fc83f756@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Add missing CX power domain to GCC

2026-03-30T13:27:40+00:00

Unless CX is declared as the power-domain of GCC, votes (power and performance) on the GDSCs it provides will not propagate to the CX, which might result in under-voltage conditions. Add the missing power-domains property to associate GCC with RPMHPD_CX. Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi") Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20260327-dt-fix-milos-eliza-gcc-power-domains-v1-2-f14a22c73fe9@oss.qualcomm.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Add UFS nodes

2026-03-26T14:40:50+00:00

Add the nodes for the UFS PHY and UFS host controller, along with the ICE used for UFS. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Abel Vesa Signed-off-by: Luca Weiss Link: https://lore.kernel.org/r/20260319-milos-ufs-v3-1-b7c60bdd0d48@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Add LPASS LPI pinctrl node

2026-03-26T14:40:48+00:00

Add a node for the LPASS LPI pinctrl found on the Milos SoC and define a few pinctrl states that will be used in the future. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Acked-by: Linus Walleij Link: https://lore.kernel.org/r/20260306-milos-pinctrl-lpi-v1-4-086946dbb855@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Fix GIC_ITS range length

2026-03-26T14:40:40+00:00

Currently, the GITS_SGIR register is cut off. Fix it up. Fixes: d9d59d105f98 ("arm64: dts: qcom: Add initial Milos dtsi") Signed-off-by: Konrad Dybcio Reviewed-by: Luca Weiss Reviewed-by: Abel Vesa Link: https://lore.kernel.org/r/20260317-topic-its_range_fixup-v1-2-49be8076adb1@oss.qualcomm.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: add ADSP GPR

2026-03-26T14:40:38+00:00

Add the ADSP Generic Packet Router (GPR) device node as part of audio subsystem in Qualcomm Milos SoC. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260306-milos-fastrpc-gpr-v1-2-893eb98869ce@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Add fastrpc nodes

2026-03-26T14:40:37+00:00

Add fastrpc nodes for both ADSP and CDSP. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20260306-milos-fastrpc-gpr-v1-1-893eb98869ce@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: milos: Sort pinctrl subnodes by pins

2026-03-26T14:40:32+00:00

As documented in the "Devicetree Sources (DTS) Coding Style" document, pinctrl subnodes should be sorted by the pins property. Do this once for milos.dtsi so that future additions can be added at the right places. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20260213-milos-pinctrl-sort-v1-1-799bae597074@fairphone.com Signed-off-by: Bjorn Andersson

arm64: dts: qcom: Add initial Milos dtsi

2026-01-05T22:31:40+00:00

Add a devicetree description for the Milos SoC, which is for example Snapdragon 7s Gen 3 (SM7635). Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20251210-sm7635-fp6-initial-v4-8-b05fddd8b45c@fairphone.com Signed-off-by: Bjorn Andersson