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<title>lwn.git/arch/arm64/boot/dts/freescale/imx8mm-var-som-symphony.dts, branch docs-next</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
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<updated>2026-03-27T13:52:39+00:00</updated>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: Enable PCIe</title>
<updated>2026-03-27T13:52:39+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:31+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=b06c76fcd88c4c3f7ec2dc88c368d1fd2770ad91'/>
<id>urn:sha1:b06c76fcd88c4c3f7ec2dc88c368d1fd2770ad91</id>
<content type='text'>
Enable PCIe support on the VAR-SOM Symphony carrier board by adding the
external reference clock, configuring the PHY and providing the required
clock and reset properties.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: Enable I2C4</title>
<updated>2026-03-27T13:52:39+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:30+00:00</published>
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<id>urn:sha1:47fc77cb042d48712d9dee6068066abff4d3e737</id>
<content type='text'>
Enable I2C4 on the Symphony carrier and add pinctrl configuration,
including GPIO-based bus recovery support.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: Add TPM2 support</title>
<updated>2026-03-27T13:52:38+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:29+00:00</published>
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<id>urn:sha1:9681db803b0544c66eacc062ac29cc80b27c0fd0</id>
<content type='text'>
Add support for the TPM2 device on the VAR-SOM Symphony carrier board.

The ST33K TPM2 is connected over I2C, and A PCA6408 GPIO expander is
used to control the reset signal required to release the TPM from reset.

Add the PCA6408 GPIO expander and the ST33K TPM2 device node.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: Enable uSD on USDHC2</title>
<updated>2026-03-27T13:52:38+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:28+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=20aa2aee5050473d83bd96a6ebbde9f3735e8b84'/>
<id>urn:sha1:20aa2aee5050473d83bd96a6ebbde9f3735e8b84</id>
<content type='text'>
Enable the microSD slot on the VAR-SOM Symphony carrier board.

Configure USDHC2 with card-detect GPIO, pinctrl states for the supported
bus speeds and the required VMMC supply.

Update the VMMC regulator to match the latest carrier revision by moving
the enable GPIO to GPIO4_IO22 and adding the required off-on delay.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: Move USB configuration from SOM</title>
<updated>2026-03-27T13:52:37+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:27+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=4e9088abeacb9fca16c3774bd3d57a696924a0f2'/>
<id>urn:sha1:4e9088abeacb9fca16c3774bd3d57a696924a0f2</id>
<content type='text'>
Move the USB controller configuration out of the i.MX8MM VAR-SOM dtsi
and into the VAR-SOM Symphony carrier board dts.

The SOM does not provide any USB connectors and carrier boards may
choose whether and how to route USB, therefore USB should be described
in the carrier-specific device tree instead of the SOM include.

While moving the nodes, align the Symphony USB description with the
carrier design by enabling both USB controllers, wiring USB1 to the
PTN5150 Type-C controller for dual-role operation, and updating the
PHY tuning and VBUS regulator pinctrl (including a sleep state).

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: freescale: imx8mm-var-som: Rework WiFi/BT and add legacy dts</title>
<updated>2026-03-27T13:52:34+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:26+00:00</published>
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<id>urn:sha1:8e7ce17e6df46e33857a1d1b416ccea2504988bc</id>
<content type='text'>
The VAR-SOM-MX8MM currently integrates the NXP IW61x wireless module,
providing WiFi over SDIO and Bluetooth over UART.

Move the wireless module configuration out of the base
imx8mm-var-som.dtsi and provide dedicated variant includes.
The IW61x configuration is moved to imx8mm-var-som-wifi-bt-iw61x.dtsi
and used by the Symphony evaluation board device tree.

A separate imx8mm-var-som-wifi-brcm-legacy.dtsi include is added to keep
the configuration for the legacy Broadcom SDIO WiFi module used on
earlier SOM revisions.

To preserve compatibility with older SOM revisions, add a separate
imx8mm-var-som-symphony-legacy.dtb, which disables the IW61x setup and
applies the Broadcom-specific configuration.

The Broadcom-based SOM revision is no longer in production, but support
is kept for existing users.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: freescale: imx8mm-var-som: Update FEC support with MaxLinear PHY</title>
<updated>2026-03-27T13:52:32+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:23+00:00</published>
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<id>urn:sha1:b58a110d8efe944315a29c0bc1af0d77b86e7bd5</id>
<content type='text'>
Update the FEC Ethernet controller on the i.MX8MM VAR-SOM to match the
latest SOM hardware revision using the integrated MaxLinear MXL86110 PHY.

Add the PHY VDDIO supply regulator, adjust reset timings and add a
pinctrl sleep state for low-power operation.

The PHY LED signals originate on the SOM, but the actual LEDs are part
of the carrier implementation (RJ45 connector). Move the LED
configuration to the Symphony carrier device tree, matching the
evaluation board LED wiring.

Wake-on-LAN via magic packet is not supported at the VAR-SOM level and
is therefore not enabled in the SOM device tree nor in the official
evaluation carrier board configuration (symphony).
Designs requiring WoL support may enable it in their own carrier-specific
device trees if properly integrated at the hardware level.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: freescale: imx8mm-var-som: Move UART4 description to Symphony</title>
<updated>2026-03-27T13:52:31+00:00</updated>
<author>
<name>Stefano Radaelli</name>
<email>stefano.r@variscite.com</email>
</author>
<published>2026-03-19T18:40:21+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=d89573876d9fa8ddc7ca50e005a4896ed890ece2'/>
<id>urn:sha1:d89573876d9fa8ddc7ca50e005a4896ed890ece2</id>
<content type='text'>
The VAR-SOM-MX8MM module does not provide an onboard debug console.
UART4 is routed and exposed only on the Symphony carrier board, while
custom carrier designs may choose to expose a different UART.

Move the UART4 node from the SOM device tree to the
imx8mm-var-som-symphony.dts, keeping the SOM dtsi limited to hardware
present on the module itself.

Signed-off-by: Stefano Radaelli &lt;stefano.r@variscite.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>arm64: dts: imx8mm-var-som-symphony: drop redundant status from typec</title>
<updated>2024-04-22T04:11:49+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2024-04-05T09:28:18+00:00</published>
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<id>urn:sha1:39870d24020c91e8d87d525bd528920f44853815</id>
<content type='text'>
"okay" is the default status, so drop redundant property from the typec
node.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: dts: freescale: align gpio-key node names with dtschema</title>
<updated>2022-06-19T08:10:14+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-06-09T11:39:32+00:00</published>
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<id>urn:sha1:b803d15e89f9f9dcbb87f5f98f175c34da4f7961</id>
<content type='text'>
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
</content>
</entry>
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