<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/arm/mach-tegra/dma.c, branch docs-fixes</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-fixes</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/lwn.git/atom?h=docs-fixes'/>
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<updated>2012-09-17T15:34:02+00:00</updated>
<entry>
<title>ARM: tegra: dma: remove legacy APB DMA driver</title>
<updated>2012-09-17T15:34:02+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2012-08-16T04:13:14+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=b4c2696798daddee46e01f974251f4ca3d6588eb'/>
<id>urn:sha1:b4c2696798daddee46e01f974251f4ca3d6588eb</id>
<content type='text'>
Remove the legacy APB dma driver. The APB DMA support
is moved to dmaengine based Tegra APB DMA driver.
All clients are also moved to dmaengine based APB DMA
driver.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: dma: rename driver name for clock to "tegra-apbdma"</title>
<updated>2012-06-26T19:04:58+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2012-06-26T07:18:32+00:00</published>
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<id>urn:sha1:72d967eda2fd69a6cac01498585bc019ade4f8ff</id>
<content type='text'>
Rename the driver name of the clock entry of Tegra APBDMA to
tegra-apbdma from of tegra-dma.

This name is more aligned towards the movement of dmaengine based
new DMA driver.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: add clk_prepare/clk_unprepare</title>
<updated>2012-06-11T17:53:29+00:00</updated>
<author>
<name>Prashant Gaikwad</name>
<email>pgaikwad@nvidia.com</email>
</author>
<published>2012-06-05T04:29:35+00:00</published>
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<id>urn:sha1:6a5278d0715c5dfd42151bb6d7444db3f2ceed52</id>
<content type='text'>
Use clk_prepare/clk_unprepare as required by the generic clk framework.

Tested on Ventana and Cardhu.

Signed-off-by: Prashant Gaikwad &lt;pgaikwad@nvidia.com&gt;
Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: dma: not required to move requestor when stopping.</title>
<updated>2012-02-07T02:25:01+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2012-01-24T08:10:49+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=8bc4f556bd740789cf6fab36d1776d6d4d8bd375'/>
<id>urn:sha1:8bc4f556bd740789cf6fab36d1776d6d4d8bd375</id>
<content type='text'>
It is not require to move the requestor of dma to INVALID
option before stopping dma.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Pause DMA when reading transfer count</title>
<updated>2012-02-07T02:24:59+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2012-01-09T20:05:11+00:00</published>
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<id>urn:sha1:cb3732d0dc9df198c889a26210b6b27bc51a1c4a</id>
<content type='text'>
In order to read an accurate channel transfer count
from the APB DMA engine, the DMA controller must be
paused first.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: use APB DMA for accessing APB devices</title>
<updated>2012-02-07T02:24:58+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2011-10-13T06:52:29+00:00</published>
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<id>urn:sha1:e2f91578b35347341482f6af9e4fcf3174531efd</id>
<content type='text'>
Tegra2 hangs if APB registers are accessed from the cpu during an
apb dma operation. The workaround is to use apb dma to read/write the
registers instead.

There is a dependency loop between fuses, clocks, and APBDMA.  If dma
is enabled, fuse reads must go through APBDMA to avoid corruption due
to a hw bug.  APBDMA requires a clock to be enabled.  Clocks must read
a fuse to determine allowable cpu frequencies.

Separate out the fuse DMA initialization, and allow the fuse read
and write functions to be called without using DMA before the DMA
initialization has been completed.  Access to the fuses before APBDMA
is initialized won't hit the hardware bug because nothing else can be
using DMA.

Original fuse registar access code from Varun Wadekar
&lt;vwadekar@nvidia.com&gt;, improved by Colin Cross &lt;ccross@android.com&gt;
and later moved to separate driver by Jon Mayo &lt;jmayo@nvidia.com&gt;.

Major refactoring/cleanup by Olof Johansson &lt;olof@lixom.net&gt;.

Changes since v1:

* fix 'return false' on error condition
* dequeue dma ops in case of timeout

From: Jon Mayo &lt;jmayo@nvidia.com&gt;.
Signed-off-by: Jon Mayo &lt;jmayo@nvidia.com&gt;.
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Don't WARN_ON() for too early dma channel allocations</title>
<updated>2012-02-07T02:24:58+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2011-12-22T14:17:40+00:00</published>
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<id>urn:sha1:13ae3d5bdf737d6078a562154ff4fef0ba5d0de1</id>
<content type='text'>
Since we'll do opportunistic allocations before the dma subsystem is
enabled we want just silent failures and retries instead.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: dma: staticify some tables and functions</title>
<updated>2011-10-13T21:08:29+00:00</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2011-09-09T01:07:35+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=cf28cba0ab02ce3e41a7b2606423eb21f1841b7a'/>
<id>urn:sha1:cf28cba0ab02ce3e41a7b2606423eb21f1841b7a</id>
<content type='text'>
None of them are used externally.

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Fix common misspellings</title>
<updated>2011-03-31T14:26:23+00:00</updated>
<author>
<name>Lucas De Marchi</name>
<email>lucas.demarchi@profusion.mobi</email>
</author>
<published>2011-03-31T01:57:33+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/lwn.git/commit/?id=25985edcedea6396277003854657b5f3cb31a628'/>
<id>urn:sha1:25985edcedea6396277003854657b5f3cb31a628</id>
<content type='text'>
Fixes generated by 'codespell' and manually reviewed.

Signed-off-by: Lucas De Marchi &lt;lucas.demarchi@profusion.mobi&gt;
</content>
</entry>
<entry>
<title>ARM: Tegra: DMA: Fail safe if initialization fails</title>
<updated>2011-02-23T22:06:03+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2011-02-23T21:49:30+00:00</published>
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<id>urn:sha1:ccac05152e7c6a8103b9e7a801bc995180a800fc</id>
<content type='text'>
tegra_dma_init currently simply bails out early if any initialization fails.
This skips various data-structure initialization. In turn, this means that
tegra_dma_allocate_channel can still hand out channels. In this case, when
tegra_dma_free_channel is called, which calls tegra_dma_cancel, the walking
on ch-&gt;list will OOPS since the list's next/prev pointers may still be
NULL.

To solve this, add an explicit "initialized" flag, only set this once _init
has fully completed successfully, and have _allocate_channel refuse to hand
out channels if this is not set.

While at it, simplify _init:
* Remove redundant memsets
* Use bitmap_fill to mark all channels as in-use up-front, and remove
  some now-redundant bitmap initialization loops.
* Only mark a channel as free once all channel-related initialization has
  completed.

Finally, the successful exit path from _init always has ret==0, so just
hard-code that return. The error path still returns ret.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Colin Cross &lt;ccross@android.com&gt;
</content>
</entry>
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