lwn.git/arch/arm/mach-s5pv310/platsmp.c, branch docs-fixes

ARM: EXYNOS4: Add EXYNOS4 CPU initialization support

2011-02-22T04:51:14+00:00

This patch adds EXYNOS4 CPU support files in mach-exynos4, and basically they are moved from mach-s5pv310 so that it can support Samsung's new CPU name, EXYNOS4. The EXYNOS4 ingegrates a ARM Cortex A9 multi-core. Signed-off-by: Kukjin Kim

Merge branch 'misc' into devel

2011-01-06T22:32:52+00:00

Conflicts: arch/arm/Kconfig arch/arm/common/Makefile arch/arm/kernel/Makefile arch/arm/kernel/smp.c

ARM: Fix subtle race in CPU pen_release hotplug code

2010-12-20T15:09:13+00:00

There is a subtle race in the CPU hotplug code, where a CPU which has been offlined can online itself before being requested, which results in things going astray on the next online/offline cycle. What happens in the normal online/offline/online cycle is: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads -1 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 However, as the write of -1 of pen_release is not fully flushed back to memory, and the checking of pen_release is done with caches disabled, this allows CPU3 the opportunity to read the old value of pen_release: CPU0 CPU3 requests boot of CPU3 pen_release = 3 flush cache line checks pen_release, reads 3 starts boot pen_release = -1 ... requests CPU3 offline ... ... dies ... checks pen_release, reads 3 starts boot pen_release = -1 requests boot of CPU3 pen_release = 3 flush cache line Fix this by grouping the write of pen_release along with its cache line flushing code to ensure that any update to pen_release is always pushed out to physical memory. Signed-off-by: Russell King

ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

2010-12-20T15:09:09+00:00

All platforms call trace_hardirqs_off() in their secondary startup code, so move this into the core SMP code - it doesn't need to be in the per-platform code. Signed-off-by: Russell King

ARM: SMP: consolidate the common parts of smp_prepare_cpus()

2010-12-20T15:09:08+00:00

There is a certain amount of smp_prepare_cpus() which doesn't belong in the platform support code - that is, code which is invariant to the SMP implementation. Move this code into arch/arm/kernel/smp.c, and add a platform_ prefix to the original function. Signed-off-by: Russell King

ARM: SMP: Clean up ncores sanity checks

2010-12-20T15:08:27+00:00

scu_get_core_count() never returns zero cores, so we don't need to check and correct if ncores is zero. Tegra was missing the check against NR_CPUS, leading to a potential bitfield overflow if this becomes the case. Signed-off-by: Russell King

ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init

2010-12-14T19:21:40+00:00

We don't need to re-pass the base address for the CPU interfaces to the GIC for secondary CPUs, as it will never be different from the boot CPU - and even if it was, we'd overwrite the boot CPU's base address. Get rid of this argument, and rename to gic_secondary_init(). Reviewed-by: Catalin Marinas Tested-by: Abhijeet Dharmapurikar Signed-off-by: Russell King

ARM: SMP: pass an ipi number to smp_cross_call()

2010-12-03T08:26:30+00:00

This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas Signed-off-by: Russell King

ARM: S5PV310: Fix on Secondary CPU startup

2010-08-27T09:29:58+00:00

Following occurs on boot message without this patch. CPU1: processor failed to boot Brought up 1 CPUs SMP: Total of 1 processors activated... This patch adds SYSRAM mapping for fixing Secondary CPU startup. CPU1: Booted secondary processor Brought up 2 CPUs SMP: Total of 2 processors activated... Signed-off-by: Changhwan Youn Signed-off-by: Kukjin Kim

ARM: S5PV310: Add new CPU initialization support

2010-08-05T09:32:41+00:00

This patch adds Samsung S5PV310/S5PC210 CPU support. The S5PV310/S5PC210 integrates a ARM Cortex A9 multi-core. Signed-off-by: Changhwan Youn Signed-off-by: Jongpill Lee Signed-off-by: Jiseong Oh [kgene.kim@samsung.com: fix build errors] Signed-off-by: Kukjin Kim