lwn.git/arch/arm/mach-realview/Kconfig, branch v3.10.3

ARM: Push selects for TWD/SCU into machine entries

2013-04-09T19:30:24+00:00

The TWD and SCU configs are selected by default as long as MSM_SCORPIONMP is false and/or MCT is false. Implementing the logic this way certainly saves lines in the Kconfig but it precludes those machines which select MSM_SCORPIONMP or MCT from participating in the single zImage effort because when those machines are combined with other SMP capable machines the TWD and SCU are no longer selected by default. Push the select out to the machine entries so that we can compile these machines together and still select the appropriate configs. Cc: Barry Song Acked-by: David Brown Cc: Kukjin Kim Cc: Linus Walleij Acked-by: Pawel Moll Cc: Rob Herring Cc: Russell King Acked-by: Santosh Shilimkar Cc: Sascha Hauer Cc: Shiraz Hashim Acked-by: Simon Horman Cc: Srinidhi Kasagar Cc: Stephen Warren Cc: Tony Lindgren Acked-by: Viresh Kumar Signed-off-by: Stephen Boyd Signed-off-by: Arnd Bergmann

ARM: config: sort select statements alphanumerically

2012-10-13T16:11:28+00:00

As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: Jason Cooper Acked-by: Tony Lindgren Acked-by: Stephen Warren Acked-by: Linus Walleij Acked-by: Sekhar Nori Signed-off-by: Russell King

ARM: SMP: Refactor Kconfig to be more maintainable

2011-12-19T13:47:39+00:00

Making SMP depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms are SMP-capable to the individual machines. To enable this, a new HAVE_SMP config option is introduced to allow machines to indicate that they can run in a SMP configuration. Signed-off-by: Dave Martin Acked-by: Linus Walleij (for nomadik, ux500) Acked-by: Tony Lindgren (for omap) Acked-by: Kukjin Kim (for exynos) Acked-by: Sascha Hauer (for imx) Acked-by: Olof Johansson (for tegra)

ARM: l2x0/pl310: Refactor Kconfig to be more maintainable

2011-12-19T13:46:11+00:00

Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms have a L2x0 or PL310 cache controller to the individual machines. To enable this, a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow machines to indicate that they may have such a cache controller independently of each other. Boards/SoCs which cannot reliably operate without the L2 cache controller support will need to select CACHE_L2X0 directly from their own Kconfigs instead. This applies to some TrustZone-enabled boards where Linux runs in the Normal World, for example. Signed-off-by: Dave Martin Acked-by: Anton Vorontsov (for cns3xxx) Acked-by: Tony Lindgren (for omap) Acked-by: Shawn Guo (for imx) Acked-by: Kukjin Kim (for exynos) Acked-by: Sascha Hauer (for imx) Acked-by: Olof Johansson (for tegra)

ARM: 6986/1: mach-realview: add TCM support for PB1176

2011-07-06T19:49:45+00:00

Enable TCM support on the RealView PB1176 - we have now taken the precautions necessary to support even multi-board builds of RealView systems with TCM enabled. Signed-off-by: Linus Walleij Signed-off-by: Russell King

ARM: v6k: Realview EB 11MPCore and PB11MPCore use V6K architecture CPUs

2011-02-02T21:23:27+00:00

Make Realview EB ARM11MPCore and PB11MPCore select the new V6K CPU option. Tested-by: Will Deacon Signed-off-by: Russell King

ARM: realview: name configuration options after actual board names

2011-01-25T15:08:01+00:00

As no one seems to really know which configuration options tie up with which boards, I thought I'd do some investigation and try to work it out. After discussion with some folk in linaro, I think I have this nailed. The names are updated to use the name on the front of the appropriate board user guide for the various baseboards, which I've taken to be the official name for each board. I haven't significantly updated the descriptions for the tiles as that is even less clear - as far as I can see on ARMs website, there is no Cortex-A9 tile for Realview EB - only ARM11MPCore, ARM1156T2F-S, ARM1176TZF-S and Cortex-R4F. So exactly what this 'Multicore Cortex-A9 Tile' is... Acked-by: Catalin Marinas Signed-off-by: Russell King

ARM: 6201/1: RealView: Do not use outer_sync() on ARM11MPCore boards with L220

2010-07-02T09:10:09+00:00

RealView boards with certain revisions of the L220 cache controller (ARM11* processors only) may have issues (hardware deadlock) with the recent changes to the mb() barrier implementation (DSB followed by an L2 cache sync). The patch redefines the RealView ARM11MPCore mandatory barriers without the outer_sync() call. Cc: Tested-by: Linus Walleij Signed-off-by: Catalin Marinas Signed-off-by: Russell King

ARM: RealView: Fix typo in the RealView/PBX Kconfig entry

2009-12-09T13:19:42+00:00

A previous patch was introducing a SPARSEMEM dependency on !HIGH_PHYS_OFFSET but it should actually be !REALVIEW_HIGH_PHYS_OFFSET. Signed-off-by: Catalin Marinas

RealView: Add sparsemem support for the RealView PBX platform

2009-11-05T10:10:36+00:00

The RealView PBX board has two 512MB blocks of memory - one at 0x70000000 (with 256MB mirror at 0) and another at 0x20000000. Only the block at 0x70000000 (or the mirror at 0) may be used for DMA (e.g. framebuffer). This patch adds the sparsemem definitions to allow the use of all the memory split as follows: 256MB @ 0x00000000 (ZONE_DMA) 512MB @ 0x20000000 (ZONE_NORMAL) 256MB @ 0x80000000 (ZONE_NORMAL) Signed-off-by: Catalin Marinas