<feed xmlns='http://www.w3.org/2005/Atom'>
<title>lwn.git/arch/arm/mach-kirkwood/rd88f6281-setup.c, branch v2.6.32.13</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
<id>http://mirrors.hust.edu.cn/git/lwn.git/atom?h=v2.6.32.13</id>
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<updated>2009-06-08T17:04:58+00:00</updated>
<entry>
<title>[ARM] Kirkwood: rationalize NAND setup a bit</title>
<updated>2009-06-08T17:04:58+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@cam.org</email>
</author>
<published>2009-06-01T19:36:36+00:00</published>
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<id>urn:sha1:fb7b2d3f0dda3fbd711c191fd3b9496653e81ac7</id>
<content type='text'>
Common resource and platform device structures are moved to common.c
and only the partition table and chip delay remains a per board
parameter.

Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'origin' into devel</title>
<updated>2009-03-28T20:29:51+00:00</updated>
<author>
<name>Russell King</name>
<email>rmk@dyn-67.arm.linux.org.uk</email>
</author>
<published>2009-03-28T20:29:51+00:00</published>
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<id>urn:sha1:ed40d0c472b136682b2fcba05f89762859c7374f</id>
<content type='text'>
Conflicts:
	sound/soc/pxa/pxa2xx-i2s.c
</content>
</entry>
<entry>
<title>dsa: add switch chip cascading support</title>
<updated>2009-03-22T02:06:54+00:00</updated>
<author>
<name>Lennert Buytenhek</name>
<email>buytenh@wantstofly.org</email>
</author>
<published>2009-03-20T09:52:09+00:00</published>
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<id>urn:sha1:e84665c9cb4db963393fafad6fefe5efdd7e4a09</id>
<content type='text'>
The initial version of the DSA driver only supported a single switch
chip per network interface, while DSA-capable switch chips can be
interconnected to form a tree of switch chips.  This patch adds support
for multiple switch chips on a network interface.

An example topology for a 16-port device with an embedded CPU is as
follows:

	+-----+          +--------+       +--------+
	|     |eth0    10| switch |9    10| switch |
	| CPU +----------+        +-------+        |
	|     |          | chip 0 |       | chip 1 |
	+-----+          +---++---+       +---++---+
	                     ||               ||
	                     ||               ||
	                     ||1000baseT      ||1000baseT
	                     ||ports 1-8      ||ports 9-16

This requires a couple of interdependent changes in the DSA layer:

- The dsa platform driver data needs to be extended: there is still
  only one netdevice per DSA driver instance (eth0 in the example
  above), but each of the switch chips in the tree needs its own
  mii_bus device pointer, MII management bus address, and port name
  array. (include/net/dsa.h)  The existing in-tree dsa users need
  some small changes to deal with this. (arch/arm)

- The DSA and Ethertype DSA tagging modules need to be extended to
  use the DSA device ID field on receive and demultiplex the packet
  accordingly, and fill in the DSA device ID field on transmit
  according to which switch chip the packet is heading to.
  (net/dsa/tag_{dsa,edsa}.c)

- The concept of "CPU port", which is the switch chip port that the
  CPU is connected to (port 10 on switch chip 0 in the example), needs
  to be extended with the concept of "upstream port", which is the
  port on the switch chip that will bring us one hop closer to the CPU
  (port 10 for both switch chips in the example above).

- The dsa platform data needs to specify which ports on which switch
  chips are links to other switch chips, so that we can enable DSA
  tagging mode on them.  (For inter-switch links, we always use
  non-EtherType DSA tagging, since it has lower overhead.  The CPU
  link uses dsa or edsa tagging depending on what the 'root' switch
  chip supports.)  This is done by specifying "dsa" for the given
  port in the port array.

- The dsa platform data needs to be extended with information on via
  which port to reach any given switch chip from any given switch chip.
  This info is specified via the per-switch chip data struct -&gt;rtable[]
  array, which gives the nexthop ports for each of the other switches
  in the tree.

For the example topology above, the dsa platform data would look
something like this:

	static struct dsa_chip_data sw[2] = {
		{
			.mii_bus	= &amp;foo,
			.sw_addr	= 1,
			.port_names[0]	= "p1",
			.port_names[1]	= "p2",
			.port_names[2]	= "p3",
			.port_names[3]	= "p4",
			.port_names[4]	= "p5",
			.port_names[5]	= "p6",
			.port_names[6]	= "p7",
			.port_names[7]	= "p8",
			.port_names[9]	= "dsa",
			.port_names[10]	= "cpu",
			.rtable		= (s8 []){ -1, 9, },
		}, {
			.mii_bus	= &amp;foo,
			.sw_addr	= 2,
			.port_names[0]	= "p9",
			.port_names[1]	= "p10",
			.port_names[2]	= "p11",
			.port_names[3]	= "p12",
			.port_names[4]	= "p13",
			.port_names[5]	= "p14",
			.port_names[6]	= "p15",
			.port_names[7]	= "p16",
			.port_names[10]	= "dsa",
			.rtable		= (s8 []){ 10, -1, },
		},
	},

	static struct dsa_platform_data pd = {
		.netdev		= &amp;foo,
		.nr_switches	= 2,
		.sw		= sw,
	};

Signed-off-by: Lennert Buytenhek &lt;buytenh@marvell.com&gt;
Tested-by: Gary Thomas &lt;gary@mlbassoc.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>[ARM] Kirkwood: register internal devices in a common place</title>
<updated>2009-02-27T03:55:59+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@cam.org</email>
</author>
<published>2009-02-27T03:55:59+00:00</published>
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<id>urn:sha1:5b99d5348304a32dfca92238d27ac4de2b365175</id>
<content type='text'>
The RTC and the two XOR engines are internal to the chip, and therefore
always available since they don't depend on a particular board layout.

Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>[ARM] Kirkwood: remove unneeded includes from board setup files</title>
<updated>2009-02-27T02:35:59+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@cam.org</email>
</author>
<published>2009-02-27T02:35:59+00:00</published>
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<id>urn:sha1:249cbfa3f5a95d022941af0febbffce5d6609e46</id>
<content type='text'>
Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>[ARM] Kirkwood: SDIO driver registration for DB6281 and RD6281</title>
<updated>2009-02-27T01:22:26+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nico@cam.org</email>
</author>
<published>2009-02-14T08:15:55+00:00</published>
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<id>urn:sha1:8235ee009cd839265f5dc2dace2758471a823e68</id>
<content type='text'>
Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>[ARM] Kirkwood: enable both XOR engines on the 6281 RD board</title>
<updated>2009-02-20T03:28:47+00:00</updated>
<author>
<name>Lennert Buytenhek</name>
<email>buytenh@wantstofly.org</email>
</author>
<published>2009-02-10T01:11:43+00:00</published>
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<id>urn:sha1:12f4815b425b26a610e5dd9a5a5e02872f0f52c5</id>
<content type='text'>
Signed-off-by: Lennert Buytenhek &lt;buytenh@marvell.com&gt;
</content>
</entry>
<entry>
<title>[ARM] Kirkwood: properly handle the WAN port on newer RD88F6281 boards</title>
<updated>2008-12-11T21:39:08+00:00</updated>
<author>
<name>Ronen Shitrit</name>
<email>rshitrit@marvell.com</email>
</author>
<published>2008-10-19T21:19:07+00:00</published>
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<id>urn:sha1:37787e449b39202afae13b6c47505ae9e977cae3</id>
<content type='text'>
On newer versions of the RD88F6281 board, the WAN port is connected to
its own ethernet port on the CPU, via a separate PHY, whereas on older
versions of the board, it is connected to one of the PHYs in the
ethernet switch.  In the RD8F6281 setup code, detect which version of
the board we are running on, and instantiate the ethernet ports and
switch driver accordingly.

Signed-off-by: Ronen Shitrit &lt;rshitrit@marvell.com&gt;
Signed-off-by: Lennert Buytenhek &lt;buytenh@marvell.com&gt;
Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>[ARM] Orion: instantiate the dsa switch driver</title>
<updated>2008-10-19T18:29:05+00:00</updated>
<author>
<name>Lennert Buytenhek</name>
<email>buytenh@wantstofly.org</email>
</author>
<published>2008-09-25T14:23:48+00:00</published>
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<id>urn:sha1:dcf1cece143d95b48676cf607a21ee0805daa55a</id>
<content type='text'>
This adds DSA switch instantiation hooks to the orion5x and the
kirkwood ARM SoC platform code, and instantiates the DSA switch
driver on the 88F5181L FXO RD, the 88F5181L GE RD, the 6183 AP GE
RD, the Linksys WRT350n v2, and the 88F6281 RD boards.

Signed-off-by: Lennert Buytenhek &lt;buytenh@marvell.com&gt;
Tested-by: Nicolas Pitre &lt;nico@marvell.com&gt;
Tested-by: Peter van Valderen &lt;linux@ddcrew.com&gt;
Tested-by: Dirk Teurlings &lt;dirk@upexia.nl&gt;
Signed-off-by: Nicolas Pitre &lt;nico@marvell.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm</title>
<updated>2008-10-11T17:09:45+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2008-10-11T17:09:45+00:00</published>
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<id>urn:sha1:7cc4e87f912bbefa440a51856b8d076e5d1f554a</id>
<content type='text'>
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (236 commits)
  [ARM] 5300/1: fixup spitz reset during boot
  [ARM] 5295/1: make ZONE_DMA optional
  [ARM] 5239/1: Palm Zire 72 power management support
  [ARM] 5298/1: Drop desc_handle_irq()
  [ARM] 5297/1: [KS8695] Fix two compile-time warnings
  [ARM] 5296/1: [KS8695] Replace macro's with trailing underscores.
  [ARM] pxa: allow multi-machine PCMCIA builds
  [ARM] pxa: add preliminary CPUFREQ support for PXA3xx
  [ARM] pxa: add missing ACCR bit definitions to pxa3xx-regs.h
  [ARM] pxa: rename cpu-pxa.c to cpufreq-pxa2xx.c
  [ARM] pxa/zylonite: add support for USB OHCI
  [ARM] ohci-pxa27x: use ioremap() and offset for register access
  [ARM] ohci-pxa27x: introduce pxa27x_clear_otgph()
  [ARM] ohci-pxa27x: use platform_get_{irq,resource} for the resource
  [ARM] ohci-pxa27x: move OHCI controller specific registers into the driver
  [ARM] ohci-pxa27x: introduce flags to avoid direct access to OHCI registers
  [ARM] pxa: move I2S register and bit definitions into pxa2xx-i2s.c
  [ARM] pxa: simplify DMA register definitions
  [ARM] pxa: make additional DCSR bits valid for PXA3xx
  [ARM] pxa: move i2c register and bit definitions into i2c-pxa.c
  ...

Fixed up conflicts in
	arch/arm/mach-versatile/core.c
	sound/soc/pxa/pxa2xx-ac97.c
	sound/soc/pxa/pxa2xx-i2s.c
manually.
</content>
</entry>
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