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<title>lwn.git/arch/arm/boot/dts/vexpress-v2m.dtsi, branch docs-mw</title>
<subtitle>Linux kernel documentation tree maintained by Jonathan Corbet</subtitle>
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<updated>2023-06-21T17:39:50+00:00</updated>
<entry>
<title>ARM: dts: Move .dts files to vendor sub-directories</title>
<updated>2023-06-21T17:39:50+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-05-04T23:38:52+00:00</published>
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<id>urn:sha1:724ba6751532055db75992fc6ae21c3e322e94a7</id>
<content type='text'>
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Michal Simek &lt;michal.simek@amd.com&gt; #Xilinx
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Acked-by: Paul Barker &lt;paul.barker@sancloud.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Wei Xu &lt;xuwei5@hisilicon.com&gt; #hisilicon
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Nick Hawkins &lt;nick.hawkins@hpe.com&gt;
Acked-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@microchip.com&gt;
Acked-by: Peter Rosin &lt;peda@axentia.se&gt;
Acked-by: Jesper Nilsson &lt;jesper.nilsson@axis.com&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt; #broadcom
Acked-by: Manivannan Sadhasivam &lt;mani@kernel.org&gt;
Reviewed-by: Jisheng Zhang &lt;jszhang@kernel.org&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@foss.st.com&gt;
Acked-by: Romain Perier &lt;romain.perier@gmail.com&gt;
Acked-by: Alexandre TORGUE &lt;alexandre.torgue@st.com&gt;
Acked-by: Shawn Guo &lt;shawnguo@kernel.org&gt;
Acked-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Acked-by: Enric Balletbo i Serra &lt;eballetbo@gmail.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>ARM: dts: arm: align UART node name with bindings</title>
<updated>2023-01-26T10:19:57+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2023-01-23T15:15:33+00:00</published>
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<id>urn:sha1:cba9e7dbf1119e9f11cef0379a88c42a92029bde</id>
<content type='text'>
Bindings expect UART/serial node names to be "serial".

Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Link: https://lore.kernel.org/r/20230123151533.369533-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: dts: vexpress: align LED node names with dtschema</title>
<updated>2022-11-25T15:48:48+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2022-11-25T14:41:12+00:00</published>
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<id>urn:sha1:e15031539490733279c41ba87f4ef2b440a685f5</id>
<content type='text'>
The node names should be generic and DT schema expects certain pattern.

  vexpress-v2p-ca9.dtb: leds: 'user1', 'user2', 'user3', 'user4', 'user5', 'user6', 'user7', 'user8' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20221125144112.476817-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: vexpress: Fix motherboard bus 'interrupt-map'</title>
<updated>2021-09-26T14:33:30+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-09-24T21:42:21+00:00</published>
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<id>urn:sha1:319aeaf69c85dc39768b3754c1786225e38e2871</id>
<content type='text'>
Commit 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with
'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress
boards. The problem is #address-cells size changed, but interrupt-map
was not updated. This results in the timer interrupt (and all the
other motherboard interrupts) not getting mapped.

As the 'interrupt-map' properties are all just duplicates across boards,
just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi.
Strictly speaking, 'interrupt-map' is dependent on the parent
interrupt controller, but it's not likely we'll ever have a different
parent than GICv2 on these old platforms. If there was one,
'interrupt-map' can still be overridden.

Link: https://lore.kernel.org/r/20210924214221.1877686-1-robh@kernel.org
Fixes: 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes")
Cc: Guillaume Tucker &lt;guillaume.tucker@collabora.com&gt;
Cc: Liviu Dudau &lt;liviu.dudau@arm.com&gt;
Cc: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Cc: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: linux-arm-kernel@lists.infradead.org
Reported-by: Reported-by: "kernelci.org bot" &lt;bot@kernelci.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes</title>
<updated>2021-09-17T09:23:41+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-08-19T18:42:39+00:00</published>
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<id>urn:sha1:078fb7aa6a8305bce09cdfbe77b4c987934442ba</id>
<content type='text'>
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.

Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara &lt;andre.przywara@arm.com&gt;
Cc: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: vexpress-v2p-ca9: Fix the SMB unit-address</title>
<updated>2021-09-14T10:33:13+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-08-19T18:42:38+00:00</published>
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<id>urn:sha1:2e9edc07df2ec6f835222151fa4e536e9e54856a</id>
<content type='text'>
Based on 'ranges', the 'bus@4000000' node unit-address is off by 1 '0'.

Link: https://lore.kernel.org/r/20210819184239.1192395-5-robh@kernel.org
Cc: Andre Przywara &lt;andre.przywara@arm.com&gt;
Cc: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: vexpress: Drop unused properties from motherboard node</title>
<updated>2021-09-14T10:33:13+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2021-08-19T18:42:37+00:00</published>
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<id>urn:sha1:55c71dc69ecb328e6212ac5154099c4230d0b83f</id>
<content type='text'>
Drop the '#interrupt-cells' property in the motherboard node which has no
effect as the node is neither an interrupt-controller or interrupt-map
(that's in the parent node).

Drop 'model' as it is not used by software nor documented.

Drop 'arm,v2m-memory-map' as it is not used by software. The purpose was
to describe which memory map, but that's all described by the DT
already.

Link: https://lore.kernel.org/r/20210819184239.1192395-4-robh@kernel.org
Cc: Andre Przywara &lt;andre.przywara@arm.com&gt;
Cc: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>usb: isp1760: use dr_mode binding</title>
<updated>2021-05-21T18:05:32+00:00</updated>
<author>
<name>Rui Miguel Silva</name>
<email>rui.silva@linaro.org</email>
</author>
<published>2021-05-13T08:47:14+00:00</published>
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<id>urn:sha1:3eb96e04be9918afa54b64fac943de86a9798bda</id>
<content type='text'>
There is already a binding to describe the dual role mode (dr_mode),
use that instead of defining a new one (port1-otg).

Update driver code and devicetree files that use that port1-otg
binding.

Signed-off-by: Rui Miguel Silva &lt;rui.silva@linaro.org&gt;
Link: https://lore.kernel.org/r/20210513084717.2487366-7-rui.silva@linaro.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: dts: arm: Fix SP805 clocks</title>
<updated>2020-09-07T09:54:08+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2020-08-28T13:05:59+00:00</published>
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<id>urn:sha1:a894c6dd56c99a44d550f65fbe87d00377b9dc3d</id>
<content type='text'>
The SP805 binding sets the name for the actual watchdog clock to
"wdog_clk" (with an underscore).

Change the name in the DTs for ARM Ltd. platforms to match that. The
Linux and U-Boot driver use the *first* clock for this purpose anyway,
so it does not break anything.

For MPS2 we only specify one clock so far, but the binding requires
two clocks to be named.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux and U-Boot SP805 driver would use the first clock
to derive the actual watchdog counter frequency. So since currently both
are the very same clock, we can just double the clock reference, and add
the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200828130602.42203-8-andre.przywara@arm.com
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM/arm64: dts: Rename SMB bus to just bus</title>
<updated>2020-03-04T14:31:30+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2020-02-26T09:19:43+00:00</published>
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<id>urn:sha1:bee7ff37ecf17317ef9295a6ab6e607db034f8a3</id>
<content type='text'>
Discussing the YAML validation schema with the DT maintainers
it came out that a bus named "smb@80000000" is not really
accepted, and the schema was written to name the static memory
bus just "bus@80000000".

This change is necessary for the schema to kick in and validate
these device trees, else the schema gets ignored.

Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Acked-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
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