From c3600c97eb9c1a20a933a7fba08272955f7a7ccc Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 23 Jun 2026 22:48:14 +0200 Subject: dt-bindings: vendor-prefixes: Add Shenzhen Baijie Technology Co., Ltd. Shenzhen Baijie Technology Co., Ltd. focuses on R&D and production of embedded products as well as customization of embedded solutions. Link: https://szbaijie.com/ Acked-by: Conor Dooley Reviewed-by: Paul Kocialkowski Signed-off-by: Alexander Sverdlin Link: https://patch.msgid.link/20260623204824.691832-3-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 396044f368e7..075fe48b4018 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -229,6 +229,8 @@ patternProperties: description: Azoteq (Pty) Ltd "^azw,.*": description: Shenzhen AZW Technology Co., Ltd. + "^baijie,.*": + description: Shenzhen Baijie Technology Co., Ltd. "^baikal,.*": description: BAIKAL ELECTRONICS, JSC "^bananapi,.*": -- cgit v1.2.3 From 1d81cb06c30746448deb73b6ce9ceccc9fb6ca37 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 23 Jun 2026 22:48:15 +0200 Subject: dt-bindings: arm: sunxi: Add Baijie HelperBoard A133 compatible Baijie HelperBoard A133 is a development board around their A133 Core board. Introduce a compatible for both the Core and the development boards. Acked-by: Conor Dooley Signed-off-by: Alexander Sverdlin Link: https://patch.msgid.link/20260623204824.691832-4-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index e6443c266fa1..82dd58b95f8a 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -96,6 +96,12 @@ properties: - const: allwinner,ba10-tvbox - const: allwinner,sun4i-a10 + - description: Baijie A133 HelperBoard + items: + - const: baijie,helperboard-a133 + - const: baijie,helperboard-a133-core + - const: allwinner,sun50i-a100 + - description: BananaPi items: - const: lemaker,bananapi -- cgit v1.2.3 From 5e5e8a2e5a5e31fbe8858f08ef7ac44dff9ee351 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 23 Jun 2026 22:48:16 +0200 Subject: dt-bindings: input: sun4i-lradc-keys: Add A100/A133 compatible The Allwinner A100/A133 SoCs have an LRADC which is compatible with the versions in existing SoCs. Add a compatible string for A100, with the R329 fallback. Signed-off-by: Alexander Sverdlin Acked-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://patch.msgid.link/20260623204824.691832-5-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai --- .../devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml index 6bdb8040be65..524c8b51f53f 100644 --- a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml +++ b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml @@ -23,6 +23,7 @@ properties: - const: allwinner,sun50i-r329-lradc - items: - enum: + - allwinner,sun50i-a100-lradc - allwinner,sun50i-h616-lradc - allwinner,sun20i-d1-lradc - const: allwinner,sun50i-r329-lradc -- cgit v1.2.3 From 8fa3a2bf77f0adb5440f25c3e2951543691e1536 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 23 Jun 2026 22:48:17 +0200 Subject: arm64: dts: allwinner: a100: Add LRADC node A100/A133 SoCs feature a Low Rate ADC (LRADC) for Key application. Specs: - Power supply voltage: 1.8 V - Reference voltage: 1.35 V - Interrupt support - Support Hold Key and General Key - Support normal, continue and single work mode - 6-bits resolution, sample rate up to 2 kHz - Voltage input range between 0 and 1.35 V Reviewed-by: Jernej Skrabec Signed-off-by: Alexander Sverdlin Link: https://patch.msgid.link/20260623204824.691832-6-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index b3fb1e0ee796..ba6020989ce9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -466,6 +466,16 @@ #thermal-sensor-cells = <1>; }; + lradc: lradc@5070800 { + compatible = "allwinner,sun50i-a100-lradc", + "allwinner,sun50i-r329-lradc"; + reg = <0x05070800 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_LRADC>; + resets = <&ccu RST_BUS_LRADC>; + status = "disabled"; + }; + usb_otg: usb@5100000 { compatible = "allwinner,sun50i-a100-musb", "allwinner,sun8i-a33-musb"; -- cgit v1.2.3 From 7204944dcb8f1131b6303a5e9ca11128eb20ac21 Mon Sep 17 00:00:00 2001 From: Alexander Sverdlin Date: Tue, 23 Jun 2026 22:48:18 +0200 Subject: arm64: dts: allwinner: A133: add support for Baijie Helper A133 board Baijie Helper A133 board is a development board around Baijie A133 Core SBC. Features: - 1/2/4GiB LPDDR4 DRAM - 8/16/32GiB eMMC - AXP707 PMIC - USB-C OTG port in peripheral mode (via onboard hub) - 2 USB 2.0 ports - MicroSD slot and on-board eMMC module - Gigabit Ethernet - Bluetooth - WiFi Add initial support for both the Helper and Core boards, including UART, PMU, eMMC, USB, Ethernet, LRADC-connected buttons. UART1 can only be used for Bluetooth module, but BT-WiFi combo Allwinner AW869A chip has no mainline driver currently. Acked-by: Jernej Skrabec Signed-off-by: Alexander Sverdlin Link: https://patch.msgid.link/20260623204824.691832-7-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/Makefile | 1 + .../allwinner/sun50i-a133-helperboard-core.dtsi | 197 +++++++++++++++++++++ .../boot/dts/allwinner/sun50i-a133-helperboard.dts | 148 ++++++++++++++++ 3 files changed, 346 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard-core.dtsi create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard.dts diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 53e6b701e7d3..aa21f58a4be1 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -24,6 +24,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-sopine-baseboard.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-teres-i.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h64-remix-mini-pc.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a100-allwinner-perf1.dtb +dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a133-helperboard.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a133-liontron-h-a133l.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-bananapi-m2-plus-v1.2.dtb diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard-core.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard-core.dtsi new file mode 100644 index 000000000000..545972d2324a --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard-core.dtsi @@ -0,0 +1,197 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Arm Ltd. + * Copyright (c) 2026 Alexander Sverdlin + */ + +/dts-v1/; + +#include "sun50i-a100.dtsi" +#include "sun50i-a100-cpu-opp.dtsi" + +/{ + model = "Baijie A133 HelperBoard Core"; + compatible = "baijie,helperboard-a133-core", + "allwinner,sun50i-a100"; + + aliases { + serial1 = &uart1; /* BT module */ + }; +}; + +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + +&lradc { + vref-supply = <®_aldo1>; +}; + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_eldo1>; + cap-mmc-highspeed; + cap-mmc-hw-reset; + max-frequency = <100000000>; + non-removable; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + status = "okay"; +}; + +&pio { + vcc-pb-supply = <®_dcdc1>; + vcc-pc-supply = <®_eldo1>; + vcc-pd-supply = <®_dcdc1>; + vcc-pe-supply = <®_dldo2>; + vcc-pf-supply = <®_dcdc1>; + vcc-pg-supply = <®_dldo1>; + vcc-ph-supply = <®_dcdc1>; + /* + * PL0/PL1 are the I2C connection to PMIC, but it would create a + * circular dependency: + * vcc-pl-supply = <®_aldo3>; + */ +}; + +&r_i2c0 { + status = "okay"; + + axp803: pmic@34 { + compatible = "x-powers,axp803"; + reg = <0x34>; + interrupt-parent = <&r_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */ + aldoin-supply = <®_vdd5v>; + dldoin-supply = <®_vdd5v>; + eldoin-supply = <®_vdd5v>; + fldoin-supply = <®_dcdc5>; + vin1-supply = <®_vdd5v>; + vin2-supply = <®_vdd5v>; + vin3-supply = <®_vdd5v>; + vin4-supply = <®_vdd5v>; + vin5-supply = <®_vdd5v>; + vin6-supply = <®_vdd5v>; + drivevbus-supply = <®_vdd5v>; + }; +}; + +#include "axp803.dtsi" + +&ac_power_supply { + status = "okay"; +}; + +®_aldo1 { + /* PLL + LRADC analog reference */ + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pll"; +}; + +®_aldo2 { + /* LPDDR */ + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vdd18-lpddr"; +}; + +®_aldo3 { + /* + * Port L, but linking it to &pio node would create a circular + * dependency because of PL0/PL1 I2C connection to PMIC + */ + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pl"; +}; + +®_dcdc1 { + /* Besides Port D it also powers analog part of USB IP and SoC I/O */ + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc-3v3"; +}; + +®_dcdc2 { + regulator-always-on; + regulator-min-microvolt = <810000>; + regulator-max-microvolt = <1200000>; + regulator-name = "vdd-cpu"; +}; + +/* DCDC3 is polyphased with DCDC2 */ + +®_dcdc4 { + /* Digital part of USB IP, "System" SoC power rail */ + regulator-always-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + regulator-name = "vdd-sys"; +}; + +®_dcdc5 { + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-name = "vcc-dram"; +}; + +/* DCDC6 unused */ +®_dcdc6 { + status = "disabled"; +}; + +®_dldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pg"; +}; + +®_dldo2 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pe"; +}; + +®_dldo3 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "avdd-csi"; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "afvcc-csi"; +}; + +®_eldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc-pc"; +}; + +®_eldo2 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "dvdd-csi"; +}; + +/* ELDO3 unused */ + +®_fldo1 { + /* CPUS power rail */ + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdd-cpus"; +}; + +/* reg_drivevbus unused */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard.dts new file mode 100644 index 000000000000..694c0cacf906 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a133-helperboard.dts @@ -0,0 +1,148 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Arm Ltd. + * Copyright (c) 2026 Alexander Sverdlin + */ + +/dts-v1/; + +#include "sun50i-a133-helperboard-core.dtsi" + +#include +#include +#include + +/{ + model = "Baijie HelperBoard A133"; + compatible = "baijie,helperboard-a133", + "baijie,helperboard-a133-core", + "allwinner,sun50i-a100"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */ + }; + }; + + reg_vdd5v: vdd5v { + /* board wide 5V supply from a 12V->5V regulator */ + compatible = "regulator-fixed"; + regulator-name = "vdd-5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; +}; + +&ehci1 { + status = "okay"; +}; + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii0_pins>; + phy-handle = <&rgmii_phy>; + phy-mode = "rgmii-id"; + allwinner,rx-delay-ps = <200>; + allwinner,tx-delay-ps = <200>; + status = "okay"; +}; + +&lradc { + wakeup-source; + status = "okay"; + + button-115 { + label = "K1"; + linux,code = ; + channel = <0>; + voltage = <114607>; + }; + + button-235 { + label = "K2"; + linux,code = ; + channel = <0>; + voltage = <234783>; + }; + + button-360 { + label = "K3"; + linux,code = ; + channel = <0>; + voltage = <360000>; + }; + + button-476 { + label = "K4"; + linux,code = ; + channel = <0>; + voltage = <476471>; + }; + + button-592 { + label = "K5"; + linux,code = ; + channel = <0>; + voltage = <591946>; + }; +}; + +&mdio0 { + reset-gpios = <&pio 7 11 GPIO_ACTIVE_LOW>; /* PH11 */ + reset-delay-us = <10000>; + reset-post-delay-us = <150000>; + + rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&mmc0 { + vmmc-supply = <®_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + disable-wp; + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&rgmii0_pins { + drive-strength = <30>; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + /* + * Connected to a downstream port of an onboard hub, therefore only + * "peripheral" mode will work here. + */ + dr_mode = "peripheral"; + status = "okay"; +}; + +&usbphy { + usb1_vbus-supply = <®_vdd5v>; + status = "okay"; +}; -- cgit v1.2.3 From 5ede58393a7064164dce027e6cb05a64662a7173 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Jul 2026 12:19:52 +0200 Subject: ARM: dts: allwinner: sun8i-h3: Correct indentation Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260706101951.341727-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts index 2b0566d4b386..88550da5af62 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts +++ b/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-duo2.dts @@ -73,7 +73,7 @@ enable-active-high; gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ vin-supply = <®_vcc5v0>; - }; + }; reg_vdd_sys: vdd-sys { compatible = "regulator-fixed"; @@ -85,7 +85,7 @@ enable-active-high; gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ vin-supply = <®_vcc5v0>; - }; + }; wifi_pwrseq: pwrseq { compatible = "mmc-pwrseq-simple"; -- cgit v1.2.3 From 9995c8146bb98a20c2b0a6d99ce3c4ec29b59d41 Mon Sep 17 00:00:00 2001 From: Lukas Schmid Date: Sat, 6 Jun 2026 22:54:41 +0200 Subject: dt-bindings: arm: sunxi: Add NetCube Systems OpenNMC (dobermann) The OpenNMC is an open replacement for APC SmartSlot management cards based on the Nagami System-on-Module. Signed-off-by: Lukas Schmid Acked-by: Krzysztof Kozlowski Acked-by: Conor Dooley Link: https://patch.msgid.link/20260606205452.2386930-2-lukas.schmid@netcube.li Signed-off-by: Chen-Yu Tsai --- Documentation/devicetree/bindings/arm/sunxi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index 82dd58b95f8a..f04db28c630a 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -604,6 +604,7 @@ properties: - description: NetCube Systems Nagami SoM based boards items: - enum: + - netcube,dobermann - netcube,nagami-basic-carrier - netcube,nagami-keypad-carrier - const: netcube,nagami -- cgit v1.2.3 From 5b0fd777eb345036fc8de9ec1c6c7b6966d90be7 Mon Sep 17 00:00:00 2001 From: Lukas Schmid Date: Sat, 6 Jun 2026 22:54:42 +0200 Subject: riscv: dts: allwinner: d1s-t113: Add uart4 pinctrl required by NetCube Systems OpenNMC Added the "uart4_pb_pins" pinctrl used by the OpenNMC Signed-off-by: Lukas Schmid Reviewed-by: Andre Przywara Link: https://patch.msgid.link/20260606205452.2386930-3-lukas.schmid@netcube.li Signed-off-by: Chen-Yu Tsai --- arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi index a810ad3eb2a2..13b1e5716604 100644 --- a/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi +++ b/arch/riscv/boot/dts/allwinner/sunxi-d1s-t113.dtsi @@ -191,6 +191,12 @@ pins = "PB6", "PB7"; function = "uart3"; }; + + /omit-if-no-ref/ + uart4_pb_pins: uart4-pb-pins { + pins = "PB2", "PB3"; + function = "uart4"; + }; }; ccu: clock-controller@2001000 { -- cgit v1.2.3 From 8a5c37efceec9d2ef0dd447ea1d0787224f04845 Mon Sep 17 00:00:00 2001 From: Lukas Schmid Date: Sat, 6 Jun 2026 22:54:43 +0200 Subject: ARM: dts: allwinner: add support for NetCube Systems OpenNMC (dobermann) NetCube Systems OpenNMC is an open replacement for APC SmartSlot Management Cards. It is based on the Nagami System-on-Module. It breaks out the following interfaces: - 10/100 Mbps Ethernet - USB Type-C OTG using a TUSB320 (usb0) - USB Type-C Console Port using a CH340 (uart3) - USB Type-A Host with internal CH334 USB-Hub (usb1) - MicroSD Slot with Card-Detect (mmc0) - WiFi/Bluetooth using the modules built-in ESP32 - SmartSlot serial interface (uart4) - DS3232 RTC with CR1220 Battery Backup - Extension connector providing SPI,I2C,USB,CAN,UART for future use. Signed-off-by: Lukas Schmid Acked-by: Jernej Skrabec Link: https://patch.msgid.link/20260606205452.2386930-4-lukas.schmid@netcube.li [wens@kernel.org: Change "sunxi" in subject to "allwinner"] Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/Makefile | 2 + .../allwinner/sun8i-t113s-netcube-dobermann.dts | 149 +++++++++++++++++++++ 2 files changed, 151 insertions(+) create mode 100644 arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-dobermann.dts diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index f71392a55df8..0fc954d41595 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -201,6 +201,7 @@ DTC_FLAGS_sun8i-h3-orangepi-pc := -@ DTC_FLAGS_sun8i-h3-bananapi-m2-plus-v1.2 := -@ DTC_FLAGS_sun8i-h3-orangepi-pc-plus := -@ DTC_FLAGS_sun8i-t113s-netcube-nagami-basic-carrier := -@ +DTC_FLAGS_sun8i-t113s-netcube-dobermann := -@ DTC_FLAGS_sun8i-v3s-netcube-kumquat := -@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a23-evb.dtb \ @@ -261,6 +262,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-s3-lichee-zero-plus.dtb \ sun8i-s3-pinecube.dtb \ sun8i-t113s-mangopi-mq-r-t113.dtb \ + sun8i-t113s-netcube-dobermann.dtb \ sun8i-t113s-netcube-nagami-basic-carrier.dtb \ sun8i-t113s-netcube-nagami-keypad-carrier.dtb \ sun8i-t3-cqa3t-bv3.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-dobermann.dts b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-dobermann.dts new file mode 100644 index 000000000000..d7765caffe2a --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-dobermann.dts @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2026 Lukas Schmid + */ + +/dts-v1/; +#include "sun8i-t113s-netcube-nagami.dtsi" + +#include + +/ { + model = "NetCube Systems OpenNMC (dobermann)"; + compatible = "netcube,dobermann", "netcube,nagami", + "allwinner,sun8i-t113s"; + + aliases { + serial2 = &uart4; // UART on SmartSlot + rtc0 = &ds3232; + rtc1 = &rtc; // not battery backed + }; + + leds { + compatible = "gpio-leds"; + + led_heartbeat_green: led-heartbeat-green { + gpios = <&pio 6 14 GPIO_ACTIVE_HIGH>; /* PG14 */ + linux,default-trigger = "heartbeat"; + color = ; + function = LED_FUNCTION_HEARTBEAT; + }; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; + + tusb320: typec@60 { + compatible = "ti,tusb320"; + reg = <0x60>; + interrupts-extended = <&pio 3 22 IRQ_TYPE_LEVEL_LOW>; /* PD22 */ + }; + + ds3232: rtc@68 { + compatible = "dallas,ds3232"; + reg = <0x68>; + }; +}; + +/* microSD Card Slot on the board */ +&mmc0 { + vmmc-supply = <®_vcc3v3>; + disable-wp; + bus-width = <4>; + cd-gpios = <&pio 6 15 GPIO_ACTIVE_LOW>; /* PG15 */ + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&pio { + gpio-line-names = "", "", "", "", // PA + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "SMART_TX", "SMART_RX", // PB + "EXT_IO3", "EXT_IO2", "CONSOLE_TX", "CONSOLE_RX", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "eMMC_CLK", "eMMC_CMD", // PC + "eMMC_D2", "eMMC_D1", "eMMC_D0", "eMMC_D3", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", // PD + "", "", "", "", + "", "USB_SEC_EN", "EXT_SPI_nCS", "EXT_SPI_SCK", + "EXT_SPI_MOSI", "EXT_SPI_MISO", "EXT_IO5", "EXT_IO4", + "SMART_SEL", "", "", "", + "I2C2_SCL", "I2C2_SDA", "TUSB320_nINT", "", + "", "", "", "", + "", "", "", "", + "ETH_CRSDV", "ETH_RXD0", "ETH_RXD1", "ETH_TXCK", // PE + "ETH_TXD0", "ETH_TXD1", "ETH_TXEN", "", + "ETH_MDC", "ETH_MDIO", "I2C3_nINT", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "uSD_D1", "uSD_D0", "uSD_CLK", "uSD_CMD", // PF + "uSD_D3", "uSD_D2", "TUSB320_ID", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "ESP_CLK", "ESP_CMD", "ESP_D0", "ESP_D1", // PG + "ESP_D2", "ESP_D3", "ESP_TXD", "ESP_RXD", + "ESP_nBOOT", "ESP_nRST", "I2C3_SCL", "I2C3_SDA", + "EXT_IO1", "EXT_IO0", "LED_HEARTBEAT", "SD_DETECT", + "", "", "", "", + "", "", "", "", + "", "", "", "", + "", "", "", ""; +}; + +/* SmartSlot serial */ +&uart4 { + pinctrl-0 = <&uart4_pb_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb_otg { + extcon = <&tusb320 0>; + dr_mode = "otg"; + status = "okay"; +}; + +&usbphy { + usb0_id_det-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ + status = "okay"; +}; -- cgit v1.2.3 From a858dab4807ab8259e00e537e8b3853b3bc7a882 Mon Sep 17 00:00:00 2001 From: Nisarg Rajput Date: Tue, 2 Jun 2026 03:38:08 +0000 Subject: ARM: dts: allwinner: enable overlay support for sun8i-h2-plus pi boards Add DTC_FLAGS -@ for all H2+ pi-class devices to enable device-tree overlay support. This follows the same approach used for H3 pi boards in commit 0801a3a9f35854c91f1f3ab8e879c3d14912d214 ("arm: dts: Enable device-tree overlay support for sun8i-h3 pi devices"). The -@ flag populates the __symbols__ node in the DTB which is required for applying device-tree overlays from the bootloader or firmware. Boards affected: - sun8i-h2-plus-bananapi-m2-zero - sun8i-h2-plus-libretech-all-h3-cc - sun8i-h2-plus-orangepi-r1 Signed-off-by: Nisarg Rajput Link: https://patch.msgid.link/BESPR10MB9223FFB989C825881E02F0CAD2122@BESPR10MB9223.EURPRD10.PROD.OUTLOOK.COM [wens@kernel.org: Move statements into common overlay block] [wens@kernel.org: Drop sun8i-h2-plus-orangepi-zero from commit message] [wens@kernel.org: Change "arm" in subject to "ARM"] Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/Makefile | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index 0fc954d41595..75b2b6a2f7a6 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -182,6 +182,9 @@ dtb-$(CONFIG_MACH_SUN7I) += \ sun7i-a20-wits-pro-a20-dkt.dtb # Enables support for device-tree overlays for all pis +DTC_FLAGS_sun8i-h2-plus-bananapi-m2-zero := -@ +DTC_FLAGS_sun8i-h2-plus-libretech-all-h3-cc := -@ +DTC_FLAGS_sun8i-h2-plus-orangepi-r1 := -@ DTC_FLAGS_sun8i-h2-plus-orangepi-zero := -@ DTC_FLAGS_sun8i-h3-orangepi-lite := -@ DTC_FLAGS_sun8i-h3-bananapi-m2-plus := -@ -- cgit v1.2.3 From eb7051f756460d7b951e94d9656e31ebb631ba28 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 20 Jul 2026 23:51:28 +0200 Subject: ARM: dts: allwinner: a10: Fix PMU interrupt The Performance Monitoring Unit of the Cortex-A8 cores in the Allwinner A10 SoC is connected to interrupt line 66, not 3. This is shown in the manual (where interrupt 3 is assigned to UART2, also in our .dtsi), but has also been confirmed by triggering an PMU overflow interrupt and inspecting the IRQ controller status registers (from U-Boot). Please note that "perf stat" does not use interrupts, this might explain why this evaded the initial testing. Fixes: 7e345d25c796 ("ARM: dts: sun4i-a10: Add PMU node") Signed-off-by: Andre Przywara Link: https://patch.msgid.link/20260720215128.5761-1-andre.przywara@arm.com Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun4i-a10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi index 51a6464aab9a..cabf619c2e21 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/allwinner/sun4i-a10.dtsi @@ -185,7 +185,7 @@ pmu { compatible = "arm,cortex-a8-pmu"; - interrupts = <3>; + interrupts = <66>; }; reserved-memory { -- cgit v1.2.3 From 96cd41eac1f59d4fc04ac267ddfe5537518c0898 Mon Sep 17 00:00:00 2001 From: Justin Suess Date: Mon, 27 Jul 2026 22:49:13 -0400 Subject: media: dt-bindings: allwinner,sun4i-a10-ir: add A523 compatible The A523 (sun55i) contains a newer revision of the sunxi CIR receiver. The reset defaults match the fixed behaviour of the older IP, so the device works fine when driven as an A31 CIR receiver. Add the A523 compatible, with allwinner,sun6i-a31-ir as the fallback. While at it, merge the standalone compatible entries into a single enum. Cc: Krzysztof Kozlowski Acked-by: Krzysztof Kozlowski Signed-off-by: Justin Suess Link: https://patch.msgid.link/20260728024916.993224-2-utilityemal77@gmail.com Signed-off-by: Chen-Yu Tsai --- .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml index 42dfe22ad5f1..18b28feacf83 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml @@ -16,9 +16,10 @@ allOf: properties: compatible: oneOf: - - const: allwinner,sun4i-a10-ir - - const: allwinner,sun5i-a13-ir - - const: allwinner,sun6i-a31-ir + - enum: + - allwinner,sun4i-a10-ir + - allwinner,sun5i-a13-ir + - allwinner,sun6i-a31-ir - items: - enum: - allwinner,suniv-f1c100s-ir @@ -27,6 +28,7 @@ properties: - allwinner,sun50i-a64-ir - allwinner,sun50i-h6-ir - allwinner,sun50i-h616-ir + - allwinner,sun55i-a523-ir - const: allwinner,sun6i-a31-ir reg: -- cgit v1.2.3 From 2b24f538652803dcead56a60d11e031dd564b2ad Mon Sep 17 00:00:00 2001 From: Justin Suess Date: Mon, 27 Jul 2026 22:49:14 -0400 Subject: arm64: dts: allwinner: a523: add IR receiver nodes The A523 has two CIR receivers, both compatible with the A31 CIR: one in the CPUX domain, clocked from the main CCU, and one in the RTC power domain, clocked from the R-CCU. The RTC domain instance's RX signal is typically muxed to PL11, as on the X96Q Pro+. The CPUX instance's can be muxed to PI8, which is what the Avaota A1 uses. Add nodes for both instances, disabled by default. Since the RX signal of each instance can be routed to more than one pin, boards with an IR receiver are expected to add the pinctrl properties next to where they enable the node. Add pinmux nodes for both pins: PL11 for the RTC domain instance, and PI8 for the CPUX one. Co-developed-by: Andre Przywara Signed-off-by: Andre Przywara Signed-off-by: Justin Suess Link: https://patch.msgid.link/20260728024916.993224-3-utilityemal77@gmail.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 36 ++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index ca6a16807049..f0b74693da7f 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -155,6 +155,13 @@ bias-disable; }; + /omit-if-no-ref/ + ir_rx_pin: ir-rx-pi-pin { + pins = "PI8"; + allwinner,pinmux = <3>; + function = "cir_rx"; + }; + /omit-if-no-ref/ ledc_ph_pin: ledc-ph-pin { pins = "PH19"; @@ -327,6 +334,17 @@ #reset-cells = <1>; }; + ir: ir@2005000 { + compatible = "allwinner,sun55i-a523-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x02005000 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_IR_RX>, <&ccu CLK_IR_RX>; + clock-names = "apb", "ir"; + resets = <&ccu RST_BUS_IR_RX>; + status = "disabled"; + }; + ledc: led-controller@2008000 { compatible = "allwinner,sun55i-a523-ledc", "allwinner,sun50i-a100-ledc"; @@ -927,6 +945,24 @@ allwinner,pinmux = <2>; function = "r_i2c0"; }; + + /omit-if-no-ref/ + r_ir_rx_pin: r-ir-rx-pl-pin { + pins = "PL11"; + allwinner,pinmux = <2>; + function = "s_cir_rx"; + }; + }; + + r_ir: ir@7040000 { + compatible = "allwinner,sun55i-a523-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x07040000 0x400>; + interrupts = ; + clocks = <&r_ccu CLK_BUS_R_IR_RX>, <&r_ccu CLK_R_IR_RX>; + clock-names = "apb", "ir"; + resets = <&r_ccu RST_BUS_R_IR_RX>; + status = "disabled"; }; pck600: power-controller@7060000 { -- cgit v1.2.3 From a3bd47e62cb2ebd96ebe5b9a8c2b95e13f4aea77 Mon Sep 17 00:00:00 2001 From: Justin Suess Date: Mon, 27 Jul 2026 22:49:15 -0400 Subject: arm64: dts: allwinner: a523: enable IR receiver on the X96Q Pro+ The X96Q Pro+ TV box has an IR receiver window on the front panel, wired to the SoC CIR input on PL11. Enable the CIR receiver in the RTC power domain and mux its RX signal to PL11. Tested on an X96Q Pro+ with ir-keytable and nec keybindings with the remote that it came with in the box. Reviewed-by: Andre Przywara Tested-by: Andre Przywara Signed-off-by: Justin Suess Link: https://patch.msgid.link/20260728024916.993224-4-utilityemal77@gmail.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts index a96927fbdadd..1eaee20acaab 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts @@ -266,6 +266,12 @@ }; }; +&r_ir { + pinctrl-names = "default"; + pinctrl-0 = <&r_ir_rx_pin>; + status = "okay"; +}; + &r_pio { /* * Specifying the supply would create a circular dependency. -- cgit v1.2.3 From 75dc83d420aa134b88bb1900fb08d7745f698bff Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 27 Jul 2026 22:49:16 -0400 Subject: arm64: dts: allwinner: a523: enable IR on the Avaota A1 The Avaota A1 board has an IR receiver chip on the PCB (next to the Ethernet jacks), wired to the PI8 pin on the SoC. Enable the CIR receiver in the main power domain. Tested on the board with evtest and some random TV remote control. Signed-off-by: Andre Przywara [justin: move the PI8 pinmux node into the dtsi patch] Signed-off-by: Justin Suess Link: https://patch.msgid.link/20260728024916.993224-5-utilityemal77@gmail.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 474354fbfcec..994f1e4f0ce7 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -100,6 +100,12 @@ status = "okay"; }; +&ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_rx_pin>; + status = "okay"; +}; + &ledc { pinctrl-names = "default"; pinctrl-0 = <&ledc_ph_pin>; -- cgit v1.2.3 From dfc735fd93e4814e65894916ec5f807f25a391d1 Mon Sep 17 00:00:00 2001 From: Ondrej Jirman Date: Sat, 25 Jul 2026 13:19:07 +0200 Subject: arm64: dts: allwinner: sun50i-a64-pinephone: Fix mpu6050 mount matrix The current mount matrix for mpu6050 is wrong. The mount matrix is a simple transform from the sensor coordinate space to the device coordinate space described in DT, where, looking at the screen, X points to the right, Y to the top, and Z towards the user. The mpu6050 is mounted like this (looking at the screen from the front; the sensor is on the near side of the PCB, so its Z axis points towards the user; o marks the pin 1 corner): +Xs ^ | +------+ +Ys <--| | | o | +------+ so this gives: Xd = -Ys [0, -1, 0] Yd = Xs [1, 0, 0] Zd = Zs [0, 0, 1] Fixes: 2496b2aaacf1 ("arm64: dts: allwinner: pinephone: Add mount matrix to accelerometer") Signed-off-by: Ondrej Jirman Link: https://patch.msgid.link/20260725111909.2244868-1-megi@xff.cz Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi index 4bc6c1ef2cde..f958bdbb0d33 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi @@ -230,8 +230,8 @@ interrupts = <7 5 IRQ_TYPE_EDGE_RISING>; /* PH5 */ vdd-supply = <®_dldo1>; vddio-supply = <®_dldo1>; - mount-matrix = "0", "1", "0", - "-1", "0", "0", + mount-matrix = "0", "-1", "0", + "1", "0", "0", "0", "0", "1"; }; }; -- cgit v1.2.3 From 3683d4f690b83a3ec8df566aa153076bfe2eb3f4 Mon Sep 17 00:00:00 2001 From: Per Larsson Date: Mon, 20 Jul 2026 19:42:42 +0200 Subject: arm64: dts: allwinner: a523: Add SPDIF output PH pin mux option When SPDIF support was added for the Allwinner A523 family of SoCs, only two of the three possible pins were added to the dtsi, since the third would clash with the first ethernet port (gmac0). However, some devices don't use gmac0 and instead use gmac1 for the only available ethernet port, leaving the pin free to use for SPDIF. Add the remaining pin mux option from the PH pin group to the dtsi so such devices can (later) use it. Signed-off-by: Per Larsson Reviewed-by: Andre Przywara Link: https://patch.msgid.link/20260720174253.7686-1-per@palvencia.se [wens@kernel.org: fix up commit message] Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi index f0b74693da7f..85ef492ffeae 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi @@ -223,6 +223,13 @@ allwinner,pinmux = <2>; }; + /omit-if-no-ref/ + spdif_out_ph_pin: spdif-ph-pin { + pins = "PH7"; + function = "spdif"; + allwinner,pinmux = <4>; + }; + /omit-if-no-ref/ spdif_out_pi_pin: spdif-pi-pin { pins = "PI10"; -- cgit v1.2.3 From 35ab3805401110513d49022db9e995069b892699 Mon Sep 17 00:00:00 2001 From: Per Larsson Date: Mon, 20 Jul 2026 19:42:43 +0200 Subject: arm64: dts: allwinner: a523: Enable SPDIF on X96QPRO+ The X96QPro+ TV box uses the PH7 pin for its SPDIF output. Add the relevant bits to the dts now that the dtsi knows about the pin. Signed-off-by: Per Larsson Link: https://patch.msgid.link/20260720174253.7686-2-per@palvencia.se [wens@kernel.org: reorder property order for spdif-out] [wens@kernel.org: fix up commit message] Signed-off-by: Chen-Yu Tsai --- .../boot/dts/allwinner/sun55i-h728-x96qpro+.dts | 24 ++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts index 1eaee20acaab..eb9fd0a65b41 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-h728-x96qpro+.dts @@ -44,6 +44,24 @@ vin-supply = <®_vcc5v>; regulator-always-on; }; + + sound-spdif { + compatible = "simple-audio-card"; + simple-audio-card,name = "spdif-out"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + compatible = "linux,spdif-dit"; + #sound-dai-cells = <0>; + }; }; &ehci0 { @@ -281,6 +299,12 @@ vcc-pm-supply = <®_aldo3>; }; +&spdif { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_out_ph_pin>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; -- cgit v1.2.3 From 4999ba58b600318a42672f6d2a54ed79876f277a Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 1 Aug 2026 23:04:51 +0200 Subject: ARM: dts: allwinner: Correct white-space style Correct a few white-space issues, like double before bracket '{' character, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260801210450.384087-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/allwinner/sun4i-a10-gemei-g9.dts | 2 +- arch/arm/boot/dts/allwinner/sun4i-a10-inet1.dts | 4 ++-- arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-gemei-g9.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-gemei-g9.dts index ea7a59dcf8f9..f6d4babe6c1c 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10-gemei-g9.dts +++ b/arch/arm/boot/dts/allwinner/sun4i-a10-gemei-g9.dts @@ -179,7 +179,7 @@ }; -&uart0 { +&uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_pb_pins>; status = "okay"; diff --git a/arch/arm/boot/dts/allwinner/sun4i-a10-inet1.dts b/arch/arm/boot/dts/allwinner/sun4i-a10-inet1.dts index 60e432a0ef1c..408d1f01412f 100644 --- a/arch/arm/boot/dts/allwinner/sun4i-a10-inet1.dts +++ b/arch/arm/boot/dts/allwinner/sun4i-a10-inet1.dts @@ -78,7 +78,7 @@ cpu-supply = <®_dcdc2>; }; -&ehci0 { +&ehci0 { status = "okay"; }; @@ -157,7 +157,7 @@ status = "okay"; }; -&ohci0 { +&ohci0 { status = "okay"; }; diff --git a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi index 544d60cfc32e..4879a437f415 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-t113s-netcube-nagami.dtsi @@ -42,7 +42,7 @@ }; /* USB0 MUX to switch connect to Card-Edge only after BootROM */ - usb0_sec_mux: mux-controller{ + usb0_sec_mux: mux-controller { compatible = "gpio-mux"; #mux-control-cells = <0>; mux-gpios = <&pio 3 9 GPIO_ACTIVE_HIGH>; /* PD9 */ -- cgit v1.2.3 From be145483f8eee440d335ed794a2294fd55ff2a35 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 1 Aug 2026 23:04:52 +0200 Subject: arm64: dts: allwinner: Correct white-space style Correct a few white-space issues, like missing space before bracket '{' character or spurious space, which will be flagged by dt-check-style ("redundant-whitespace" warning). No functional changes. Signed-off-by: Krzysztof Kozlowski Link: https://patch.msgid.link/20260801210450.384087-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Chen-Yu Tsai --- arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi | 2 +- arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 2 +- arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts | 2 +- arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi index 6d78a1c98f10..3b9ded8375dc 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi @@ -49,7 +49,7 @@ }; }; -&spi0 { +&spi0 { status = "okay"; flash@0 { diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts index 6e30a564c87f..5627d2828fc9 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-libretech-all-h5-cc.dts @@ -48,7 +48,7 @@ }; }; -&spi0 { +&spi0 { status = "okay"; flash@0 { diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts index 0f29da7d51e6..6e57ee19e799 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -191,7 +191,7 @@ }; }; -&spi0 { +&spi0 { status = "okay"; flash@0 { diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts index 3322cc4d9aa4..f9fbaf6df237 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts @@ -103,7 +103,7 @@ }; }; -&spi0 { +&spi0 { status = "okay"; flash@0 { diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi index a8644fb52b04..0d3e761f6466 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi @@ -99,7 +99,7 @@ status = "okay"; }; -&spi0 { +&spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts index b340bbcb710d..ff9b40352a54 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts @@ -149,7 +149,7 @@ }; }; -&spi0 { +&spi0 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts index 994f1e4f0ce7..85247186461d 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-avaota-a1.dts @@ -409,7 +409,7 @@ assigned-clock-rates = <32768>; }; -&spi0 { +&spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pj_pins>, <&spi0_cs0_pj_pin>, <&spi0_hold_pj_pin>, <&spi0_wp_pj_pin>; diff --git a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts index 055be86e5fae..26ce579b42bf 100644 --- a/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts +++ b/arch/arm64/boot/dts/allwinner/sun55i-t527-orangepi-4a.dts @@ -400,7 +400,7 @@ assigned-clock-rates = <32768>; }; -&spi0 { +&spi0 { pinctrl-names = "default"; pinctrl-0 = <&spi0_pc_pins>, <&spi0_cs0_pc_pin>; status = "okay"; -- cgit v1.2.3