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<title>linux-next.git/rust/kernel/io, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
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<updated>2026-10-06T10:55:34+00:00</updated>
<entry>
<title>Merge branch 'driver-core-next' of https://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core.git</title>
<updated>2026-10-06T10:55:34+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-10-06T10:55:34+00:00</published>
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<id>urn:sha1:41c2fb26c01eb4d5a07dd3b3987981f7bc8f0706</id>
<content type='text'>
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</entry>
<entry>
<title>rust: io: convert ResourceSize into a transparent newtype</title>
<updated>2026-10-01T22:07:02+00:00</updated>
<author>
<name>Lorenzo Delgado</name>
<email>lnsdev@proton.me</email>
</author>
<published>2026-09-27T18:11:38+00:00</published>
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<id>urn:sha1:7db73c69c8311bfe72b3acbd6807d57cd755bdc7</id>
<content type='text'>
`ResourceSize` is a bare type alias for `resource_size_t`, so it
inherits every integer operation and `as` cast. That allows operations
that make no sense for the size of a hardware resource, such as mixing
it with unrelated integers or truncating it with a cast.

Wrap it in a `#[repr(transparent)]` newtype so each conversion at a
boundary is explicit. The representation is unchanged, so this is
ABI-identical; only the spelling at the FFI boundary changes. Provide
`from_raw`/`into_raw`, `From` in both directions, and a fallible
`TryFrom&lt;ResourceSize&gt; for usize`, since `resource_size_t` can be wider
than `usize` on 32-bit.

Update the producer, `Resource::size`, and its consumers in `Region`
and `request_region`.

Suggested-by: Miguel Ojeda &lt;ojeda@kernel.org&gt;
Link: https://github.com/Rust-for-Linux/linux/issues/1203
Signed-off-by: Lorenzo Delgado &lt;lnsdev@proton.me&gt;
Link: https://patch.msgid.link/20260927-resource-size-newtype-v4-2-447a08af23fb@proton.me
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: pci: add resource_flags accessor</title>
<updated>2026-09-11T13:08:19+00:00</updated>
<author>
<name>Joel Fernandes</name>
<email>joelagnelf@nvidia.com</email>
</author>
<published>2026-09-08T07:51:48+00:00</published>
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<id>urn:sha1:3f1e12fce16f6e88fbaab3404df33f65c8f4df87</id>
<content type='text'>
Add a `Device::resource_flags()` method to the PCI Rust abstraction,
wrapping the C-side static inline `pci_resource_flags()`.

The flags returned correspond to the `IORESOURCE` bitmask carried by a
PCI BAR's `struct resource`.

The immediate motivation is BAR layout discovery on NVIDIA GPUs: a
64-bit BAR consumes two consecutive Linux PCI resource slots (the lower
32 bits at index N and the upper 32 bits at index N+1, with the latter
having no flags or size of its own).

Signed-off-by: Joel Fernandes &lt;joelagnelf@nvidia.com&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Acked-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
Link: https://patch.msgid.link/20260908-pci-resource-flags-v1-1-269f29f81de6@nvidia.com
Signed-off-by: Eliot Courtney &lt;ecourtney@nvidia.com&gt;
</content>
</entry>
<entry>
<title>rust: io: register: unify handling of register with/without bitfields</title>
<updated>2026-09-06T11:39:49+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:40+00:00</published>
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<id>urn:sha1:a12f711dc53c1ca1d7ff4184e1609182174de87b</id>
<content type='text'>
Move the `FixedRegister` from a property of register to become a property
of type. Name the new trait `FixedIoLoc` indicating if I/O location of a
type is unique for a specific base. Thus, bitfields become just a special
case of this (where type is unique because we're generating it in the
register macro), and expose feature to registers without inline bitfield
definition with the `#[unique]` attribute.

Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-16-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: register: remove `Register` trait and cleanup macro</title>
<updated>2026-09-06T11:39:49+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:39+00:00</published>
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<id>urn:sha1:a8ab43a1089e289b58d303a1c10d0f81284087e7</id>
<content type='text'>
With the removal of relative registers, there are only two type of
registers left, fixed register and register arrays. There is not much
benefit in having a common super trait for them anymore, thus remove it,
and cleanup the macro rules associated with it.

Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-15-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: register: remove relative registers</title>
<updated>2026-09-06T11:39:49+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:38+00:00</published>
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<id>urn:sha1:631adefcac893728c278f4bd2c9634cfe3f35482</id>
<content type='text'>
Relative registers can be better served by projection to subregion instead
of ad-hoc handling in register macro. Projection composes better (e.g. it
natively allows relative registers of relative registers without needing
additional support).

Remove relative register support, and update the documentation to
demonstrate how projection and subregions can be used to achieve this
instead.

Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-14-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: register: support fixed offset register without bitfield</title>
<updated>2026-09-06T11:39:49+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:35+00:00</published>
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<id>urn:sha1:c09d3a26e1b810d43ee8a15c4f09ee752fee55a6</id>
<content type='text'>
Add a rule to allow creating `IoLoc` in `register!()` using an existing
type and not create a bitfield. Add an example to demonstrate this for FIFO
registers.

This rule is also going to be used to create subregions for registers; the
example of doing so will be added later when relative registers are
removed.

Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-11-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: register: make register have a typed base</title>
<updated>2026-09-06T11:39:49+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:34+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=4f620881808e9d3d951343e2edc9c8c41286391a'/>
<id>urn:sha1:4f620881808e9d3d951343e2edc9c8c41286391a</id>
<content type='text'>
Previously `register!` defined registers can be used on any untyped I/O
regions. With all users specifying their desired register type now,
propagate the specified type and restrict I/O access only when type
matches.

Also, add an `io_project!` example which is enabled by this change.

Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-10-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: register: allow explicit base type specification</title>
<updated>2026-09-06T11:39:48+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:30+00:00</published>
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<id>urn:sha1:12c78173d8b21fd53cf98e456c14b005e6a3675e</id>
<content type='text'>
Currently registers work for all untyped I/O regions, which is not ideal.
It allows registers defined for device A to work for another device B and
there is no safeguarding at all.

All users of the `register!` macro know what type it will be operating on,
and that type is consistent across the driver. Therefore, add a `base`
parameter to `register!`.

Currently this parameter is unused in the generated code; it will be used
when all users of `register!` is converted to gain the parameter.

Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-6-5552b1d59525@garyguo.net
[ Remove unnecessary #[allow(unused)] from the 'base' field. - Danilo ]
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
<entry>
<title>rust: io: perform conversions using `AsRepr`</title>
<updated>2026-09-06T11:39:48+00:00</updated>
<author>
<name>Gary Guo</name>
<email>gary@garyguo.net</email>
</author>
<published>2026-09-01T16:50:28+00:00</published>
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<id>urn:sha1:ff067ace5fbeada7e629d4aaccfa1d04da3eeebc</id>
<content type='text'>
For types that are layout-compatible with an I/O capable type, we would
want the ability to use them directly for I/O operations. E.g.

    bitfield! {
        pub struct Foo(u32) {
            ...
        }
    }

    #[repr(C)]
    struct Bar {
        foo: Foo,
    }

    let mmio: Mmio&lt;'_, Bar&gt; = ...;
    io_read!(mmio, .foo)

Currently this feature is available from `register!()` macro but not
otherwise available with `io_read!`, `io_write!`. Support this by
performing conversions to I/O primitives via the `AsRepr`/`AsReprMut`
trait.

This makes the `IoLoc::IoType` and `Register::Storage` redundant; thus
remove them; also convert register methods to use the `read_val` and
`write_val` instead.

Reviewed-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Signed-off-by: Gary Guo &lt;gary@garyguo.net&gt;
Tested-by: Alexandre Courbot &lt;acourbot@nvidia.com&gt;
Link: https://patch.msgid.link/20260901-typed_register-v4-4-5552b1d59525@garyguo.net
Signed-off-by: Danilo Krummrich &lt;dakr@kernel.org&gt;
</content>
</entry>
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