linux-next.git/include/linux/mlx5, branch master

Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma.git

2026-08-21T12:57:08+00:00

net/mlx5: Move vport DOWN state check out of mlx5_query_vport_max_tx_speed()

2026-08-20T19:22:42+00:00

mlx5_query_vport_max_tx_speed() was introduced to serve the query_port_speed path, which uses max_tx_speed == 0 when port is down. This is incorrect for callers that need the actual configured speed regardless of vport state, such as modify-vport-state helpers that must preserve the speed across state transitions. Move this logic to the caller function in the verb flow and let mlx5_query_vport_max_tx_speed() return the raw firmware value unconditionally. Fixes: aaecff5e13cd ("RDMA/mlx5: Implement query_port_speed callback") Signed-off-by: Or Har-Toov Reviewed-by: Shay Drori Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Link: https://patch.msgid.link/20260816065015.3280733-3-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: SD, prefer sd_group_size from vport context

2026-08-14T19:27:12+00:00

Newer FW reports the SD group size directly in the NIC vport context via the sd_group_size field, gated by the sd_group_size capability. Switch sd_init() to source the group size from there and fall back to the MPIR-based host_buses query only when the cap is absent. sd_group_size might return 1 in some FW configuration. Add explicit check to disable SD creation in this case. While here, rename host_buses to group_size throughout sd.c to follow the new name on capable FW. Signed-off-by: Shay Drory Reviewed-by: Moshe Shemesh Signed-off-by: Tariq Toukan Reviewed-by: Simon Horman Link: https://patch.msgid.link/20260810093037.3138197-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: add debugfs stats for doorbell dma pools

2026-08-06T02:02:15+00:00

Add a debugfs file exposing per-node DMA pool usage for doorbell allocations. # cat /sys/kernel/debug/mlx5//db_dma_pools node block_size used_blocks allocated_blocks 0 64 0 0 1 64 0 0 Signed-off-by: Nimrod Oren Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260803132520.2891860-4-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: allocate doorbells from dma pools

2026-08-06T02:02:15+00:00

Allocate doorbells from dma pools instead of the pgdir allocator. Doorbell records remain cache-line sized coherent DMA allocations, but their sub-allocation is now handled by the common mlx5 DMA pool infrastructure. This also makes doorbell allocation honor the requested NUMA node when reusing existing backing pages. The old pgdir allocator used the requested node only when allocating a new pgdir page; later allocations scanned one global pgdir list and could take any pgdir with a free entry, even if that page had been allocated for a different NUMA node. Selecting the per-node DMA pool before sub-allocation keeps reused doorbell records on pages allocated for the requested node. Signed-off-by: Nimrod Oren Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260803132520.2891860-3-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: initialize doorbell dma pools

2026-08-06T02:02:15+00:00

Add per-node doorbell dma pool creation and cleanup to mdev lifecycle. Signed-off-by: Nimrod Oren Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260803132520.2891860-2-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: Add qp_latency_sensitive_disable cap bit

2026-07-27T06:35:16+00:00

Introduce the qp_latency_sensitive_disable capability bit to indicate that the device no longer implements a separate class for latency-sensitive QPs, so drivers can stop programming the latency_sensitive QPC field and skip allocating the dedicated fast-path bfreg on such HW. Signed-off-by: Michael Guralnik Reviewed-by: Patrisious Haddad Signed-off-by: Edward Srouji Link: https://patch.msgid.link/20260726-deprecate-lat-qps-v2-1-5e0c2ee55046@nvidia.com Signed-off-by: Leon Romanovsky

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2026-07-23T21:07:40+00:00

Cross-merge networking fixes after downstream PR (net-7.2-rc5). Conflicts: drivers/net/amt.c 3656a79f94c47 ("amt: re-read skb header pointers after every pull") 586c4dcf28eb6 ("amt: no longer rely on RTNL in amt_fill_info()") https://lore.kernel.org/amIaJr3aOQNS_Fvl@sirena.org.uk Adjacent changes: drivers/net/geneve.c 8efb8f8bbb35 ("geneve: require CAP_NET_ADMIN in the device netns for changelink") 0ba269933f73 ("geneve: convert config to RCU-protected pointer") Signed-off-by: Jakub Kicinski

net/mlx5: Fix MCIA register buffer overflow on 32 dword reads

2026-07-23T15:19:29+00:00

The MCIA register can return up to 32 dwords (128 bytes) when the device advertises the mcia_32dwords capability, but struct mlx5_ifc_mcia_reg_bits only defines dword_0..11, leaving room for just 12 dwords (48 bytes) of data. mlx5_query_mcia() clamps the read size to mlx5_mcia_max_bytes() and then memcpy()s that many bytes out of the register, potentially reading past the end of the 'out' buffer. On kernels built with FORTIFY_SOURCE this is caught as a buffer overflow while reading the module EEPROM via ethtool: detected buffer overflow in memcpy kernel BUG at lib/string_helpers.c:1048! RIP: 0010:fortify_panic+0x13/0x20 Call Trace: mlx5_query_mcia.isra.0+0x200/0x210 [mlx5_core] mlx5_query_module_eeprom_by_page+0x4a/0xa0 [mlx5_core] mlx5e_get_module_eeprom_by_page+0xbb/0x120 [mlx5_core] eeprom_prepare_data+0xf3/0x170 ethnl_default_doit+0xf1/0x3b0 Extend the mcia_reg layout to 32 dwords. Fixes: 271907ee2f29 ("net/mlx5: Query the maximum MCIA register read size from firmware") Signed-off-by: Gal Pressman Reviewed-by: Alex Lazar Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260717072338.1240582-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski

net/mlx5: Add PSP related fields to the mlx5_ifc

2026-07-16T08:24:02+00:00

This adds: - misc_parameters_6, containing a few fields for matching PSP headers. As this is the last misc_parameters field defined, retire the old optimization added in commit [1] to not touch the reserved part. - PSP decap action. - PSP SPI header field pointer. [1] commit 667cb65ae5ad ("net/mlx5: Don't store reserved part in FTEs and FGs") Signed-off-by: Cosmin Ratiu Reviewed-by: Dragos Tatulea Signed-off-by: Tariq Toukan Link: https://patch.msgid.link/20260713084320.1015240-3-tariqt@nvidia.com Reviewed-by: Jacob Keller Signed-off-by: Leon Romanovsky