<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/include/linux/firmware, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
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<updated>2026-10-06T10:37:24+00:00</updated>
<entry>
<title>Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git</title>
<updated>2026-10-06T10:37:24+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-10-06T10:37:24+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=29d1a2f83aed89ff3c9f428911fb6b565e5da38d'/>
<id>urn:sha1:29d1a2f83aed89ff3c9f428911fb6b565e5da38d</id>
<content type='text'>
# Conflicts:
#	include/sound/tas2781.h
</content>
</entry>
<entry>
<title>Merge branch 'for-next' of https://github.com/Xilinx/linux-xlnx.git</title>
<updated>2026-10-06T09:38:32+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-10-06T09:38:32+00:00</published>
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<id>urn:sha1:298746f5a72acdd7490247151e7d56f1f6da6b32</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git</title>
<updated>2026-10-06T09:38:19+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-10-06T09:38:19+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=a9b906bd7ee95c169c4b76c0ff3011c607a39d72'/>
<id>urn:sha1:a9b906bd7ee95c169c4b76c0ff3011c607a39d72</id>
<content type='text'>
# Conflicts:
#	include/linux/mod_devicetable.h
</content>
</entry>
<entry>
<title>firmware: cs_dsp: Annotate struct cs_dsp_coeff_ctl with __counted_by_ptr</title>
<updated>2026-09-28T12:11:36+00:00</updated>
<author>
<name>Bill Wendling</name>
<email>morbo@google.com</email>
</author>
<published>2026-09-28T04:45:13+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=3e71ea6dca1d585692b645aaf3b8cc58f6e5eb35'/>
<id>urn:sha1:3e71ea6dca1d585692b645aaf3b8cc58f6e5eb35</id>
<content type='text'>
Annotate the 'cache' pointer member of 'struct cs_dsp_coeff_ctl' with
the '__counted_by_ptr' attribute. This allows the compiler and KASAN
to perform run-time bounds checking on accesses to the 'cache' buffer,
preventing potential out-of-bounds reads or writes.

The 'cache' pointer points to a buffer of size 'len' bytes, allocated
to hold the cached value of a DSP coefficient control. The 'cache' and
'len' are initialized in 'cs_dsp_create_control()'.

Every subsequent access to 'ctl-&gt;cache' is strictly validated to
ensure that it lies within the bounds of 'ctl-&gt;len'.

Cc: codemender-patching+linux@google.com
Assisted-by: LLM
Signed-off-by: Bill Wendling &lt;morbo@google.com&gt;
Reviewed-by: Richard Fitzgerald &lt;rf@opensource.cirrus.com&gt;
Link: https://patch.msgid.link/20260928044513.1330392-1-morbo@google.com
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: support RPU boot from DDR</title>
<updated>2026-09-25T13:42:55+00:00</updated>
<author>
<name>Tanmay Shah</name>
<email>tanmay.shah@amd.com</email>
</author>
<published>2026-08-03T20:05:02+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=118be086595e8f98b19e8fa8e24276466a8e9483'/>
<id>urn:sha1:118be086595e8f98b19e8fa8e24276466a8e9483</id>
<content type='text'>
Cortex-R52 cores can boot from DDR. In such case, elf's boot address
will be in the ddr, and it should be passed to the PLM via EEMI call.
Add ddr boot config EEMI call before starting RPU to configure the boot
address. Also make sure TCM-Boot is support for old platforms as well.
Remove HIVEC &amp; LOVEC enum, as now PLM supports boot address directly.

Signed-off-by: Tanmay Shah &lt;tanmay.shah@amd.com&gt;
Link: https://patch.msgid.link/20260803200502.209361-1-tanmay.shah@amd.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>firmware: xilinx: ufs: move PHY/SRAM ready polling into the firmware backend</title>
<updated>2026-09-25T13:40:38+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2026-08-04T15:02:31+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=e93e5ac0719cd31e7e78e590e76b7be88519716a'/>
<id>urn:sha1:e93e5ac0719cd31e7e78e590e76b7be88519716a</id>
<content type='text'>
The Versal Gen 2 UFS driver polls the firmware for M-PHY TX/RX
configuration readiness and SRAM initialisation completion with two
open-coded do/while loops. Each iteration is a full firmware round-trip
(PM_IOCTL/IOCTL_READ_REG of a protected PMC_IOU_SLCR register), so the
loop can issue up to a million EEMI calls, and it hard-codes the wait
policy inside the controller driver.

Introduce coarse blocking helpers, zynqmp_pm_wait_mphy_tx_rx_config_ready()
and zynqmp_pm_wait_sram_init_done(), that take a caller-supplied timeout
budget and contain the poll loop. The loop is EEMI-specific (legacy
firmware only exposes the per-read status primitive) so it lives in the
firmware driver, keeping the UFS driver backend-agnostic: a future
backend can offload the wait to the platform in a single call without
touching the controller driver again. The existing per-read primitives stay
exported, so the current EEMI interface is unchanged.

The timeout budget remains owned by the UFS driver (the consumer that
knows the hardware) and is passed down, so EEMI and any future backend
stay consistent.

Reviewed-by: Sai Krishna Potthuri &lt;sai.krishna.potthuri@amd.com&gt;
Link: https://patch.msgid.link/eaeaaea8ed76069943e0706a0917139ff6569929.1785855749.git.michal.simek@amd.com
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
</content>
</entry>
<entry>
<title>firmware: imx: add driver for NXP EdgeLock Enclave</title>
<updated>2026-09-23T21:16:40+00:00</updated>
<author>
<name>Pankaj Gupta</name>
<email>pankaj.gupta@nxp.com</email>
</author>
<published>2026-09-14T19:40:00+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=dfc0183f20c3b21d67a3e4e6dd34b833a83c19fc'/>
<id>urn:sha1:dfc0183f20c3b21d67a3e4e6dd34b833a83c19fc</id>
<content type='text'>
Add MU-based communication interface for secure enclave.

NXP hardware IP(s) for secure-enclaves like Edgelock Enclave(ELE), are
embedded in the SoC to support the features like HSM, SHE &amp; V2X, using
message based communication interface.

The secure enclave FW communicates with Linux over single or multiple
dedicated messaging unit(MU) based interface(s).
Exists on i.MX SoC(s) like i.MX8ULP, i.MX93, i.MX95 etc.

For i.MX9x SoC(s) there is at least one dedicated ELE MU(s) for each
world - Linux(one or more) and OPTEE-OS (one or more).

Other dependent kernel drivers will be:
- NVMEM: that supports non-volatile devices like EFUSES,
  managed by NXP's secure-enclave.

Signed-off-by: Pankaj Gupta &lt;pankaj.gupta@nxp.com&gt;
Reviewed-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
</content>
</entry>
<entry>
<title>firmware: qcom_scm: Remove SCM PAS wrappers</title>
<updated>2026-08-31T20:35:06+00:00</updated>
<author>
<name>Sumit Garg</name>
<email>sumit.garg@oss.qualcomm.com</email>
</author>
<published>2026-07-02T11:58:29+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=3eda4fa73e30207eb7afedde6987f7f321f74fbc'/>
<id>urn:sha1:3eda4fa73e30207eb7afedde6987f7f321f74fbc</id>
<content type='text'>
Now since all the Qcom SCM client drivers have been migrated over to
generic PAS TZ service, let's drop the exported SCM PAS wrappers.

Reviewed-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt;
Tested-by: Mukesh Ojha &lt;mukesh.ojha@oss.qualcomm.com&gt; # Lemans
Tested-by: Vignesh Viswanathan &lt;vignesh.viswanathan@oss.qualcomm.com&gt; # IPQ9650
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Sumit Garg &lt;sumit.garg@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260702115835.167602-14-sumit.garg@kernel.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'rproc-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux</title>
<updated>2026-08-25T21:03:31+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-25T21:03:31+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=fc710de0dd25ed50a087833b4171eb1a46737a9e'/>
<id>urn:sha1:fc710de0dd25ed50a087833b4171eb1a46737a9e</id>
<content type='text'>
Pull remoteproc updates from Bjorn Andersson:
 "Add a remoteproc driver and binding for AMD MicroBlaze/V soft cores
  executing from dual-port BRAM, with clock and reset control and
  support for firmware without a resource table.

  Introduce a generic Qualcomm PAS service with SCM and OP-TEE backends,
  and migrate the PAS, MSS, and WCNSS remoteproc drivers to it. Add Nord
  ADSP and CDSP support, Eliza CDSP support, Maili ADSP/CDSP bindings,
  and late-attach SoCCP support for Kaanapali, Hawi, Maili, and Glymur.
  Enable BAM-DMUX child devices for PAS modems and fix PAS memory
  protection, handover, shutdown, and resource lifetime handling.

  Harden remoteproc lifecycle handling by attaching asynchronously,
  stopping crashed processors, synchronizing crash work with removal,
  and forcing shutdown before device resources are released. Reallocate
  resources during attach recovery and fix several reference and
  error-path leaks.

  Add Xilinx R5 crash detection and move RPU start and stop sequencing
  into the platform firmware driver. Consolidate write-combining
  carveout mapping callbacks, use correct I/O-memory accessors, and
  share optional ELF resource-table handling across drivers.

  Convert the TI Wakeup M3 binding to DT schema, correct Qualcomm and
  generic remoteproc bindings, and harden resource-table iteration
  against signed-offset out-of-bounds accesses"

* tag 'rproc-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux: (60 commits)
  remoteproc: fix OOB read via signed offset in rsc_table_for_each_entry()
  remoteproc: replace BSD blurb with SPDX identifier in rsc_table.h
  remoteproc: replace BSD blurb with SPDX identifier in remoteproc.h
  remoteproc: fix coding style issues in remoteproc.h
  MAINTAINERS: add rsc_table.h to remoteproc entry
  remoteproc: qcom: pas: Add Nord ADSP and CDSP support
  dt-bindings: remoteproc: qcom,nord-pas: Document Nord PAS
  remoteproc: qcom: pas: Drop unused dtb_mem_region field
  remoteproc: qcom: pas: Map/unmap subsystem region before auth_and_reset
  remoteproc: qcom: pas: Fix the PAS context creation placement
  remoteproc: qcom: pas: Guard dtb metadata release with dtb_pas_id check
  remoteproc: qcom: annotate mem_region fields with __iomem
  arm64: dts: qcom: eliza: Add fallback compatible for ADSP remoteproc
  dt-bindings: remoteproc: qcom,milos-pas: Move Eliza ADSP to SM8550 schema
  remoteproc: qcom: pas: Add Eliza CDSP support
  dt-bindings: remoteproc: qcom,sm8550-pas: Add Eliza CDSP compatible
  remoteproc: qcom: q6v5: Request shutdown if crash is triggered host-side
  remoteproc: Force shutdown during device removal
  remoteproc: Prevent crash handling to race with rproc_del()
  remoteproc: Allow shutdown of crashed processors
  ...
</content>
</entry>
<entry>
<title>Merge tag 'char-misc-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc</title>
<updated>2026-08-25T16:38:50+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-25T16:38:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=93e4b3076b5f2d853462b9777d083c77fc0b7b23'/>
<id>urn:sha1:93e4b3076b5f2d853462b9777d083c77fc0b7b23</id>
<content type='text'>
Pull char/misc/IIO/etc driver updates from Greg KH:
 "Here is the big set of char, misc, iio, counter, fpga, and other small
  driver subsystems for 7.3-rc1.

  Overall, due to some driver removals we only added a bit more code
  than removed, which was a nice change. Highlights in this merge
  request are:

   - Loads of IIO driver updates and additions

   - binder driver updates (more on that below...)

   - Removal of the SGI XP and GRU drivers as they are not used anymore
     and turn out to be pretty insecure overall

   - Removal of the obsolete ibmasm driver as it's not being used
     anymore

   - Coresight driver updates and additions

   - Mei driver udpates

   - Counter driver updates

   - FPGA driver updates

   - ICC driver updates

   - lots and lots of other tiny driver updates to resolve reported
     issues

  All of these have been in linux-next for a while"

* tag 'char-misc-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (513 commits)
  iio: chemical: atlas-sensor: use iio_trigger_poll_nested() to fix remove UAF
  iio: adc: pac1921: fix wrong channel used in trigger handler read
  iio: light: gp2ap002: re-enable irq if runtime suspend fails
  iio: light: gp2ap002: Fix unbalanced runtime PM on repeated event writes
  iio: light: apds9306: fix PM reference leak in apds9306_read_data()
  iio: gyro: mpu3050: fix sign of raw angular velocity readings
  iio: srf04: fix pm_runtime handling on probe error path
  iio: adc: ad4080: configure backend data size
  iio: adc: adi-axi-adc: add data size support for AD408X backend
  iio: chemical: atlas-sensor: fix PM reference leak in buffer postenable
  iio: dac: ad5446: fix OF module device table
  iio: light: opt4001: Fix reversed GENMASK() arguments in fault count mask
  iio: light: opt4001: Reject integration times with a non-zero seconds part
  iio: light: opt4001: Fix incompatible pointer type passed to div_u64_rem()
  iio: light: opt4001: Fix power down clearing bits of the wrong register
  iio: light: opt4060: Fix incorrect register name in threshold read error message
  iio: light: opt4060: Fix pointer type passed to div_u64_rem()
  iio: light: opt4060: Reject integration times with a non-zero seconds part
  iio: light: ltrf216a: fix runtime PM reference leak in error path
  iio: pressure: dps310: fix NULL pointer dereference on ACPI probe
  ...
</content>
</entry>
</feed>
