<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/pinctrl, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/'/>
<updated>2026-09-03T16:05:01+00:00</updated>
<entry>
<title>Merge branch 'headers' of git://git.infradead.org/users/willy/pagecache.git</title>
<updated>2026-09-03T16:05:01+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-09-03T16:05:01+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=9f308e750b94959e79f2109cc7688537d37cb358'/>
<id>urn:sha1:9f308e750b94959e79f2109cc7688537d37cb358</id>
<content type='text'>
# Conflicts:
#	net/ceph/osd_client.c
</content>
</entry>
<entry>
<title>Merge branch 'pinctrl-qcom/for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux.git</title>
<updated>2026-09-03T16:04:19+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-09-03T16:04:19+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=6f44376bda77b30b1a36612cf81a522f9bdbb4c6'/>
<id>urn:sha1:6f44376bda77b30b1a36612cf81a522f9bdbb4c6</id>
<content type='text'>
</content>
</entry>
<entry>
<title>pinctrl: qcom: Add Kuno pinctrl driver</title>
<updated>2026-09-02T10:26:36+00:00</updated>
<author>
<name>Hardeep Sharma</name>
<email>hardeep.sharma@oss.qualcomm.com</email>
</author>
<published>2026-08-27T17:51:12+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=d0344c6510d050ee79c6aa3997f2c641168ebf08'/>
<id>urn:sha1:d0344c6510d050ee79c6aa3997f2c641168ebf08</id>
<content type='text'>
Add the TLMM pinctrl driver for the Qualcomm Kuno platform, supporting
110 GPIOs and their pin multiplexing, pin configuration and gpiolib
interface through the common pinctrl-msm driver.

Signed-off-by: Hardeep Sharma &lt;hardeep.sharma@oss.qualcomm.com&gt;
Reviewed-by: Linus Walleij &lt;linusw@kernel.org&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260827-kuno-soc-support-v5-9-6d47636a8f09@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: spmi-gpio: Add PMAU0102 GPIO support</title>
<updated>2026-09-02T10:24:11+00:00</updated>
<author>
<name>Dhruvin Rajpura</name>
<email>drajpura@qti.qualcomm.com</email>
</author>
<published>2026-08-30T04:29:39+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=1cc8b87bd9719f5c496d27a1b4d2892947ba70d5'/>
<id>urn:sha1:1cc8b87bd9719f5c496d27a1b4d2892947ba70d5</id>
<content type='text'>
Add support for the PMAU0102 PMIC GPIO block, which has 12 GPIOs,
used on Nord platform.

Signed-off-by: Dhruvin Rajpura &lt;drajpura@qti.qualcomm.com&gt;
Signed-off-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260830042939.144376-3-shengchao.guo@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM</title>
<updated>2026-09-01T16:01:49+00:00</updated>
<author>
<name>Prasad Kumpatla</name>
<email>prasad.kumpatla@oss.qualcomm.com</email>
</author>
<published>2026-08-21T11:35:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=6f168dea0db7bf35089a7fe942f1df6214464fcc'/>
<id>urn:sha1:6f168dea0db7bf35089a7fe942f1df6214464fcc</id>
<content type='text'>
Add pin controller driver for the Low Power Audio SubSystem (LPASS)
Low Power Island (LPI) of Qualcomm Hawi SoC.

The controller has 23 GPIOs with SoundWire, I2S, DMIC, VA I2S,
ext_mclk1 and slimbus mux functions.

Two pins (gpio13, gpio22) require 6 mux slots due to a test_bus
entry occupying a middle hardware slot. Add LPI_PINGROUP6 macro
to pinctrl-lpass-lpi.h to support pins with 5 alternate functions.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Prasad Kumpatla &lt;prasad.kumpatla@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260821113548.2686650-3-prasad.kumpatla@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: renesas: rzg2l: Add SD channel POC support for RZ/G3L</title>
<updated>2026-08-31T10:20:06+00:00</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2026-07-23T15:41:47+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=d48a308fabd6dc7676d570f0bc971817e39d824c'/>
<id>urn:sha1:d48a308fabd6dc7676d570f0bc971817e39d824c</id>
<content type='text'>
Add power-on control (POC) support for SD channels 1 and 2 on the RZ/G3L
SoC (r9a08g046).

Introduce PIN_CFG_IO_VMC_SD2 capability flag (bit 22) and SD_CH2_POC
register offset (0x3024). Extend rzg2l_caps_to_pwr_reg() to return
SD_CH2_POC when PIN_CFG_IO_VMC_SD2 is set.

Replace RZG3L_MPXED_PIN_FUNCS() with RZG2L_MPXED_COMMON_PIN_FUNCS() for
port PG and PH pins, dropping PIN_CFG_SOFT_PS which is inappropriate for
SD pins, and annotate them with PIN_CFG_IO_VMC_SD1 and PIN_CFG_IO_VMC_SD2
respectively.

Annotate all RZ/G3L SD0 dedicated pins (CLK, CMD, RST#, DS, DAT0–DAT7)
with PIN_CFG_IO_VMC_SD0 so that power-source register lookups work
correctly for those pins.

Add sd_ch2 field to rzg2l_register_offsets and rzg2l_pinctrl_reg_cache to
save and restore the SD_CH2_POC register across suspend/resume cycles.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://patch.msgid.link/20260723154154.319674-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>headers: Remove swap.h from suspend.h</title>
<updated>2026-08-25T19:12:26+00:00</updated>
<author>
<name>Matthew Wilcox (Oracle)</name>
<email>willy@infradead.org</email>
</author>
<published>2026-08-11T18:51:44+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=372c1254a10712f04cc47fa96b6627b58f091eb6'/>
<id>urn:sha1:372c1254a10712f04cc47fa96b6627b58f091eb6</id>
<content type='text'>
Nothing in suspend.h needs swap.h.  However, many files indirectly
depend on some of swap.h's dependencies, so this is a large
cross-subsystem patch.  Stats:

42 are missing includes of interrupt.h (the question of why swap.h
brings in interrupt.h remains unanswered).
10 missing includes of seq_file.h
5 missing includes of swap.h (obviously all files could have just added
swap.h, but I preferred to bring in a more minimal inclusion set)
3 missing includes of highmem.h
2 missing includes of device.h
2 missing includes of string_choices.h
1 missing include of cacheflush.h
1 missing include of dma-direction.h
1 missing include of kthread.h
1 missing include of pagemap.h
1 missing include of string_helpers.h
1 missing include of writeback.h

I tried to follow whatever conventions appeared to be in use for the
various subsystems I touched; for example I added string_choices.h to
drm_print.h instead of individually to each driver which used the
functions declared there.

Signed-off-by: Matthew Wilcox (Oracle) &lt;willy@infradead.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2026-08-24T15:46:03+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-08-24T15:46:03+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=cf9610f9116d55c5a66ef9f1faecacabd93a9322'/>
<id>urn:sha1:cf9610f9116d55c5a66ef9f1faecacabd93a9322</id>
<content type='text'>
Pull pin control updates from Linus Walleij:
 "Core changes:

   - Use the non-blocking mux_state_try_select() in the generic MUX pin
     control back-end

   - Free pin maps on pinctrl_generic_to_map() failure in the core
     helpers

  New hardware pin control:

   - Qualcomm Maili TLMM SoC, PMG1110 PMIC, and Eliza LPASS LPI TLMM SoC
     (this is for the low power audio, LPASS = Low Power Audio SubSystem
     portions)

   - Upboard support on top of the Intel pin controller

   - Apple T6030 and T6031 support (just compatible strings)

   - Samsung Exynos 8855 SoC

   - Mediatek MT6858 SoC

   - Rockchip RK3308B and RV1106 SoCs

   - Airoha EN7523 and AN7563 SoCs

  Improvements:

   - Qualcomm TLMM GPIOs are unconditionally marked as wakeup capable

   - Qualcomm improvements on top of the Qualcomm PDC (power domain
     controller) irqchip improvements from tglx:s tree

   - Qualcomm IPQ806x and IPQ9650 non-urgent pin grop fixups

   - The NPCM8xx driver has been put into shape fixing many pin and
     group definitions

   - Some non-urgent Tegra 264 pin assignments are fixed up

   - Some non-urgent fixups to Airoha AN7581 and AN7583 registers and
     pin assignments, missing features etc"

* tag 'pinctrl-v7.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (130 commits)
  dt-bindings: pinctrl: Convert TI DA850 pupd to DT schema
  pinctrl: meson: sync some modify from A4
  pinctrl: meson: a4: Add input enable pin configuration
  pinctrl: realtek: rtd1625: remove unused group name spdif_sel
  pinctrl: realtek: rtd1625: fix base_bit for VE4 GPIO 13
  dt-bindings: pinctrl: microchip,pic32mzda-pinctrl: Convert to DT schema
  Revert "Merge branch 'ib-rsk7204' into devel"
  pinctrl: rockchip: Add RV1106 pinctrl support
  dt-bindings: pinctrl: rockchip: Add RV1106 compatible
  pinctrl: rockchip: Decode drive strength in the get function
  pinctrl: fix PINCTRL_GENERIC_MUX not always being selectable
  pinctrl: airoha: add support of an7563 SoC
  dt-bindings: pinctrl: airoha: add support of an7563 pin controller
  pinctrl: airoha: try to find chip scu node by phandle first
  pinctrl: airoha: add support of en7523 SoC
  dt-bindings: pinctrl: airoha: add support of en7523 pin controller
  pinctrl: airoha: an7583: add support for olt pinmux
  pinctrl: airoha: an7583: add support for pon_alt pinmux
  pinctrl: airoha: an7583: add support for npu_uart pinmux
  dt-bindings: pinctrl: airoha: an7583: add missed features
  ...
</content>
</entry>
<entry>
<title>Merge tag 'v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next</title>
<updated>2026-08-18T12:21:04+00:00</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bartosz.golaszewski@oss.qualcomm.com</email>
</author>
<published>2026-08-18T12:21:04+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=146cc263e457ff6055fe7829e4f4f4b0b5d5dd86'/>
<id>urn:sha1:146cc263e457ff6055fe7829e4f4f4b0b5d5dd86</id>
<content type='text'>
Linux 7.2
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-qcom-updates-for-v7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel</title>
<updated>2026-08-16T16:59:43+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linusw@kernel.org</email>
</author>
<published>2026-08-16T16:59:43+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=d067f0f4c96cb5402a111cf649b7bf9c5771ec74'/>
<id>urn:sha1:d067f0f4c96cb5402a111cf649b7bf9c5771ec74</id>
<content type='text'>
Qualcomm pinctrl updates for v7.3-rc1

New drivers:
- add pinctrl drivers for Maili TLMM and Elize LPASS LPI TLMM controllers

Driver updates:
- acknowledge interrupts for the PDC interrupt controller in pinctrl-msm
- implement irq_get/set_irqchip_state() for pinctrl-msm
- add support for a new model to Qualcomm pinctrl-spmi-gpio
- drop some dead code from qcom pinctrl modules

Devicetree bindings:
- document new TLMM controllers and the new model for the SPMI GPIO

Signed-off-by: Linus Walleij &lt;linusw@kernel.org&gt;
</content>
</entry>
</feed>
