<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/gpu/drm/amd/pm/amdgpu_dpm.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
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<updated>2026-07-08T18:20:29+00:00</updated>
<entry>
<title>drm/amd/pm: retire legacy smu ras driver framework</title>
<updated>2026-07-08T18:20:29+00:00</updated>
<author>
<name>Ce Sun</name>
<email>cesun102@amd.com</email>
</author>
<published>2026-04-03T03:06:05+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=958430a1f068f6be6c9376e07014a9e8c63ae24e'/>
<id>urn:sha1:958430a1f068f6be6c9376e07014a9e8c63ae24e</id>
<content type='text'>
Remove the legacy smu ras driver framework

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Ce Sun &lt;cesun102@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Rename enable_bapm() to notify_ac_dc()</title>
<updated>2026-05-27T14:48:11+00:00</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2026-05-19T08:41:55+00:00</published>
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<id>urn:sha1:ba1fcd1bac89d0403f910754e1d5ec22acb5bf28</id>
<content type='text'>
No functional changes, just change the name of this
function pointer to be more generic.

BAPM refers to a specific feature on KV, but other kinds of
ASICs may also need the SMU to be notified on AC/DC changes.

Also remove the argument and use adev-&gt;pm.ac_power instead.

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: fix race in power state check before mutex lock</title>
<updated>2026-01-27T23:11:27+00:00</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2026-01-27T03:07:07+00:00</published>
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<id>urn:sha1:7a3fbdfd19ec5992c0fc2d0bd83888644f5f2f38</id>
<content type='text'>
The power state check in amdgpu_dpm_set_powergating_by_smu() is done
before acquiring the pm mutex, leading to a race condition where:
1. Thread A checks state and thinks no change is needed
2. Thread B acquires mutex and modifies the state
3. Thread A returns without updating state, causing inconsistency

Fix this by moving the mutex lock before the power state check,
ensuring atomicity of the state check and modification.

Fixes: 6ee27ee27ba8 ("drm/amd/pm: avoid duplicate powergate/ungate setting")
Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Return -EOPNOTSUPP when can't read power limit</title>
<updated>2026-01-21T19:22:11+00:00</updated>
<author>
<name>Timur Kristóf</name>
<email>timur.kristof@gmail.com</email>
</author>
<published>2026-01-19T20:36:25+00:00</published>
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<id>urn:sha1:e53dcefe30df4f317161f36e8bc11926e7dd7a2e</id>
<content type='text'>
So that hwmon_attributes_visible() will see that the power2_cap
attributes should not be visible on GPUs that don't support
the get_power_limit() function.

This fixes an error when running the "sensors" command on SI.

Fixes: 12c958d1db36 ("drm/amd/pm: Expose ppt1 limit for gc_v9_5_0")
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Timur Kristóf &lt;timur.kristof@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Convert DRM_*() to drm_*()</title>
<updated>2026-01-05T21:59:55+00:00</updated>
<author>
<name>Mario Limonciello (AMD)</name>
<email>superm1@kernel.org</email>
</author>
<published>2025-12-15T01:12:27+00:00</published>
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<id>urn:sha1:e291729873095262697758c389c8d7affa81bdcc</id>
<content type='text'>
The drm_*() macros include the device which is helpful for debugging
issues in multi-GPU systems.

Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Reviewed-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: Deprecate print_clock_levels interface</title>
<updated>2025-12-08T19:14:35+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2025-11-26T10:38:14+00:00</published>
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<id>urn:sha1:a50d32c41fb25d772cc1c47b6abed8fb811d58c2</id>
<content type='text'>
Use emit_clock_levels instead of print_clock_levels

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: adjust the visibility of pp_table sysfs node</title>
<updated>2025-11-24T17:36:12+00:00</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2025-10-30T01:06:22+00:00</published>
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<id>urn:sha1:5de8ce0f3709ad93ca5a579aa45cf1b52d72bc90</id>
<content type='text'>
v1:
- make pp_table invisible on VF mode (only valid on BM)
- make pp_table invisible on Mi* chips (Not supported)
- make pp_table invisible if scpm feature is enabled.

v2:
move pp_table invisible code logic into amdgpu_dpm_get_pp_table() function.

v3:
add table buffer pointer check both on powerplay &amp; swsmu.

Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/pm: add smu ras driver framework</title>
<updated>2025-11-04T16:53:58+00:00</updated>
<author>
<name>Gangliang Xie</name>
<email>ganglxie@amd.com</email>
</author>
<published>2025-09-15T04:52:35+00:00</published>
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<id>urn:sha1:f5346a176cb5e2860581ee91110d6f037bb87d85</id>
<content type='text'>
add functions to get smu ras driver

Signed-off-by: Gangliang Xie &lt;ganglxie@amd.com&gt;
Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Drop PMFW RLC notifier from amdgpu_device_suspend()</title>
<updated>2025-11-04T16:52:48+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-10-26T04:29:36+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=960e30a61e1a7ca5341a6cf9481e770e1cda24aa'/>
<id>urn:sha1:960e30a61e1a7ca5341a6cf9481e770e1cda24aa</id>
<content type='text'>
For S3 on vangogh, PMFW needs to be notified before the
driver powers down RLC.  This already happens in smu_disable_dpms()
so drop the superfluous call in amdgpu_device_suspend().

Co-developed-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello (AMD) &lt;superm1@kernel.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Stop overloading power limit with limit type</title>
<updated>2025-10-13T18:14:35+00:00</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2025-10-09T20:59:04+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=5f4f49a41c14890c05faa99881e98cc156ba7e03'/>
<id>urn:sha1:5f4f49a41c14890c05faa99881e98cc156ba7e03</id>
<content type='text'>
When passed around internally the upper 8 bits of power limit include
the limit type. This is non-obvious without digging into the nuances
of each function. Instead pass the limit type as an argument to all
applicable layers.

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
