<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/gpu/drm/amd/amdkfd/kfd_flat_memory.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/'/>
<updated>2026-03-04T16:42:26+00:00</updated>
<entry>
<title>drm/amdgpu: GFX12.1 scratch memory limit up to 57-bit</title>
<updated>2026-03-04T16:42:26+00:00</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2026-02-26T20:15:51+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=b2d13a41da94008fdd3786b396a6375c12454522'/>
<id>urn:sha1:b2d13a41da94008fdd3786b396a6375c12454522</id>
<content type='text'>
The scratch aperture or gmc private aperture in flat memory contains
57 bits of data on gfx v12.1.0 compared to the 32 bits from previous.

Add new helper kfd_init_apertures_v12 for gfx version &gt;= v12.1.0 which
supports 57-bit VA space.

v2:
  - update pdd-&gt;scratch_limit (Yu, Lang)
  - update fixes tag (Felix Kuehling)
  - add helper kfd_init_apertures_v12

Fixes: db1882b3ff0c ("drm/amdkfd: Update LDS, Scratch base for 57bit address")
Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Reviewed-by: Lang Yu &lt;lang.yu@amd.com&gt;
Acked-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Switch to using GC VERSION to decide LDS/Scratch base</title>
<updated>2026-01-14T19:28:58+00:00</updated>
<author>
<name>Lang Yu</name>
<email>lang.yu@amd.com</email>
</author>
<published>2025-12-17T03:01:39+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=bcd600ab7f2e8ebf7eb5b6ab28dd479341c389e0'/>
<id>urn:sha1:bcd600ab7f2e8ebf7eb5b6ab28dd479341c389e0</id>
<content type='text'>
Next generation GC IP with 4-level page table needs to use the
same LDS/Scratch base with 5-level page table, use GC VERSION
to decide is more appropriate.

Signed-off-by: Lang Yu &lt;lang.yu@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Update LDS, Scratch base for 57bit address</title>
<updated>2025-12-16T18:28:03+00:00</updated>
<author>
<name>Philip Yang</name>
<email>Philip.Yang@amd.com</email>
</author>
<published>2025-04-22T20:30:02+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=db1882b3ff0c51d3ffdcdeee7ad1f9f01ea78453'/>
<id>urn:sha1:db1882b3ff0c51d3ffdcdeee7ad1f9f01ea78453</id>
<content type='text'>
For 5-level page tables, update compute vmid sh_mem_base LDS aperture
and Scratch aperture base address to above 57-bit, use the same setting
from gfx vmid, we can remove the duplicate macro.

Update queue pdd lds_base and scratch_base to the same value as
sh_mem_base setting. Then application get process apertures return the
correct value to access LDS and Scratch memory for 57bit address 5-level
page tables. This may pass to MES in future when mapping queue.

Signed-off-by: Philip Yang &lt;Philip.Yang@amd.com&gt;
Acked-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Do not include &lt;linux/export.h&gt; when unused</title>
<updated>2025-06-30T15:53:45+00:00</updated>
<author>
<name>André Almeida</name>
<email>andrealmeid@igalia.com</email>
</author>
<published>2025-06-13T18:26:50+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=6531fd55f3217b3cb8cdc41611e39ca12e095fe5'/>
<id>urn:sha1:6531fd55f3217b3cb8cdc41611e39ca12e095fe5</id>
<content type='text'>
Fix the following compile time warning when building with W=1:

warning: EXPORT_SYMBOL() is not used, but #include &lt;linux/export.h&gt; is present

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Use device based logging for errors</title>
<updated>2024-07-01T20:10:47+00:00</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2024-06-24T08:03:16+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=62ec7d38b769ccf33b1080e69c2ae5b7344d116d'/>
<id>urn:sha1:62ec7d38b769ccf33b1080e69c2ae5b7344d116d</id>
<content type='text'>
Convert some pr_* to some dev_* APIs to identify the device.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole</title>
<updated>2024-02-16T20:41:50+00:00</updated>
<author>
<name>Felix Kuehling</name>
<email>felix.kuehling@amd.com</email>
</author>
<published>2024-01-25T19:12:43+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=34a1de0f79352086884553f78db271f957a98583'/>
<id>urn:sha1:34a1de0f79352086884553f78db271f957a98583</id>
<content type='text'>
The TBA and TMA, along with an unused IB allocation, reside at low
addresses in the VM address space. A stray VM fault which hits these
pages must be serviced by making their page table entries invalid.
The scheduler depends upon these pages being resident and fails,
preventing a debugger from inspecting the failure state.

By relocating these pages above 47 bits in the VM address space they
can only be reached when bits [63:48] are set to 1. This makes it much
less likely for a misbehaving program to generate accesses to them.
The current placement at VA (PAGE_SIZE*2) is readily hit by a NULL
access with a small offset.

v2:
- Move it to the reserved space to avoid concflicts with Mesa
- Add macros to make reserved space management easier

v3:
- Move VM  max PFN calculation into AMDGPU_VA_RESERVED macros

Cc: Arunpravin Paneer Selvam &lt;Arunpravin.PaneerSelvam@amd.com&gt;
Cc: Christian Koenig &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Jay Cornwall &lt;jay.cornwall@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole"</title>
<updated>2024-01-05T21:10:44+00:00</updated>
<author>
<name>Kaibo Ma</name>
<email>ent3rm4n@gmail.com</email>
</author>
<published>2024-01-03T04:29:56+00:00</published>
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<id>urn:sha1:0f35b0a7b8fa402adbffa2565047cdcc4c480153</id>
<content type='text'>
That commit causes NULL pointer dereferences in dmesgs when
running applications using ROCm, including clinfo, blender,
and PyTorch, since v6.6.1. Revert it to fix blender again.

This reverts commit 96c211f1f9ef82183493f4ceed4e347b52849149.

Closes: https://github.com/ROCm/ROCm/issues/2596
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2991
Reviewed-by: Jay Cornwall &lt;jay.cornwall@amd.com&gt;
Signed-off-by: Kaibo Ma &lt;ent3rm4n@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: drop IOMMUv2 support</title>
<updated>2023-08-11T18:47:25+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-07-28T16:20:12+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=c99a2e7ae291e5b19b60443eb6397320ef9e8571'/>
<id>urn:sha1:c99a2e7ae291e5b19b60443eb6397320ef9e8571</id>
<content type='text'>
Now that we use the dGPU path for all APUs, drop the
IOMMUv2 support.

v2: drop the now unused queue manager functions for gfx7/8 APUs

Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Tested-by: Mike Lothian &lt;mike@fireburn.co.uk&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Relocate TBA/TMA to opposite side of VM hole</title>
<updated>2023-08-07T21:14:06+00:00</updated>
<author>
<name>Jay Cornwall</name>
<email>jay.cornwall@amd.com</email>
</author>
<published>2023-07-12T20:53:44+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=96c211f1f9ef82183493f4ceed4e347b52849149'/>
<id>urn:sha1:96c211f1f9ef82183493f4ceed4e347b52849149</id>
<content type='text'>
The TBA and TMA, along with an unused IB allocation, reside at low
addresses in the VM address space. A stray VM fault which hits these
pages must be serviced by making their page table entries invalid.
The scheduler depends upon these pages being resident and fails,
preventing a debugger from inspecting the failure state.

By relocating these pages above 47 bits in the VM address space they
can only be reached when bits [63:48] are set to 1. This makes it much
less likely for a misbehaving program to generate accesses to them.
The current placement at VA (PAGE_SIZE*2) is readily hit by a NULL
access with a small offset.

Signed-off-by: Jay Cornwall &lt;jay.cornwall@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Introduce kfd_node struct (v5)</title>
<updated>2023-06-09T13:42:27+00:00</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2022-09-14T08:39:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=8dc1db3172ae2f17ae71e33b608a33411ce8a1aa'/>
<id>urn:sha1:8dc1db3172ae2f17ae71e33b608a33411ce8a1aa</id>
<content type='text'>
Introduce a new structure, kfd_node, which will now represent
a compute node. kfd_node is carved out of kfd_dev structure.
kfd_dev struct now will become the parent of kfd_node, and will
store common resources such as doorbells, GTT sub-alloctor etc.
kfd_node struct will store all resources specific to a compute
node, such as device queue manager, interrupt handling etc.

This is the first step in adding compute partition support in KFD.

v2: introduce kfd_node struct to gc v11 (Hawking)
v3: make reference to kfd_dev struct through kfd_node (Morris)
v4: use kfd_node instead for kfd isr/mqd functions (Morris)
v5: rebase (Alex)

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Tested-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Morris Zhang &lt;Shiwu.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
