linux-next.git/drivers/gpu/drm/amd/amdgpu/si.c, branch masterLinux kernel latest sourcehttp://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master2026-07-06T20:58:43+00:00drm/amdgpu: include amdgpu_video_codecs.h only where needed2026-07-06T20:58:43+00:00Shahyan Soltanishahyan.soltani@amd.com2026-06-08T17:42:21+00:00urn:sha1:f43bacd8dd5c58f31b44c58d8c9181c3f79c5e70
Remove #include "amdgpu_video_codecs.h" from amdgpu.h and add forward declaration
of struct amdgpu_video_codecs.
Add #include "amdgpu_video_codecs.h" into files amdgpu_kms.c, amdgpu_virt.c,
cik.c, nv.c, si.c, soc15.c, soc21.c, soc24.c, soc_v1_0.c, and vi.c.
Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Clean up defunct soft reset from ASIC reset code path2026-07-01T15:11:38+00:00Timur Kristóftimur.kristof@gmail.com2026-06-17T19:14:13+00:00urn:sha1:a86f14aebb8f1e017a32f326ca177a149690e74e
Soft reset means resetting IP blocks individually using
a hardware interconnect (SRBM or GRBM) without assistance
from firmware.
Soft reset is a useful tool for implementing GPU recovery,
eg. it is already successfully used for SDMA queue resets.
It should be used by a GPU recovery method instead of
being called directly from the ASIC reset code path.
Currently, this is only used on Carrizo and Stoney,
but doesn't work well and fails on those chips.
A subsequent commit will add a working GFX8 recovery
implementation after the cleanups.
Note that this commit only cleans up the ASIC reset path,
which also unblocks more opportunities for cleanup for
the various IP blocks. Those will be done in subsequent commits.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Move pcie lock to register block2026-03-02T21:46:41+00:00Lijo Lazarlijo.lazar@amd.com2025-12-09T06:02:42+00:00urn:sha1:b2d55124712b3551842bab228f27db3df8068b30
Move pcie register access lock to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add pcie indirect to register block2026-03-02T21:46:28+00:00Lijo Lazarlijo.lazar@amd.com2025-12-09T04:17:13+00:00urn:sha1:e84d7e717bf94bd977e20e5ca52d0b2ae4e19802
Move pcie indirect access to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add pciep method to register block2026-03-02T21:46:19+00:00Lijo Lazarlijo.lazar@amd.com2025-12-09T04:05:18+00:00urn:sha1:5d82f451b0ab2d7137d9ffdd0d15675b756ab29d
Move pcie port method to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add didt method to register block2026-03-02T21:46:03+00:00Lijo Lazarlijo.lazar@amd.com2025-12-08T13:22:42+00:00urn:sha1:4780a26a96f88631d56f7bd0eee4e2c6721a279b
Move didt callbacks to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add uvd indirect to register block2026-03-02T21:43:10+00:00Lijo Lazarlijo.lazar@amd.com2025-12-08T13:08:52+00:00urn:sha1:366201e790f10ddc081ef787e2e345553b87459d
Add uvd indirect method to register access block and replace the
existing calls from adev.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add smc method to register block2026-03-02T21:42:38+00:00Lijo Lazarlijo.lazar@amd.com2025-12-08T12:56:09+00:00urn:sha1:f4eb08f8b216c334752246fe24e1304477d78968
Define register access block which consolidates different register access
methods. Add smc method to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd: Convert DRM_*() to drm_*()2026-01-05T21:59:55+00:00Mario Limonciello (AMD)superm1@kernel.org2025-12-15T01:12:27+00:00urn:sha1:e291729873095262697758c389c8d7affa81bdcc
The drm_*() macros include the device which is helpful for debugging
issues in multi-GPU systems.
Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Make pre_asic_init optional2025-12-08T18:56:42+00:00Lijo Lazarlijo.lazar@amd.com2025-11-28T07:06:46+00:00urn:sha1:018fd6d7d92d704709e8dfe497fe3aac1566e90f
pre_asic_init is not required for all SOCs. Make it optional and remove
empty implementations.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>