<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/'/>
<updated>2026-09-02T18:54:40+00:00</updated>
<entry>
<title>drm/amdgpu: switch all IPs to using job for IBs</title>
<updated>2026-09-02T18:54:40+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-01-07T18:59:08+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=770e3dd8e2b058896b0880174d37b3b58a06b0bc'/>
<id>urn:sha1:770e3dd8e2b058896b0880174d37b3b58a06b0bc</id>
<content type='text'>
Switch remaining direct submissions to using a job structure for IBs.
This converts GFX, compute, SDMA, and VPE to using jobs.  VCE, UVD, JPEG,
and VCN already did.

v2: fix missing ib pointer setup spotted by the kernel test robot
v3: rebase

Acked-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Remove is_idle (non trivial functions)</title>
<updated>2026-08-25T22:25:28+00:00</updated>
<author>
<name>Dr. David Alan Gilbert</name>
<email>linux@treblig.org</email>
</author>
<published>2026-08-15T18:00:32+00:00</published>
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<id>urn:sha1:d1b8ffe14aa47df6ef9c2208496458b48c0bd28a</id>
<content type='text'>
The is_idle method on amd_ip_funcs is never called.
Remove the implementations that actually do something.
In most cases the same code has been duplicated in
the wait_for_idle method implementations that is still used.

Signed-off-by: Dr. David Alan Gilbert &lt;linux@treblig.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move struct amdgpu_wb and helpers into separate files</title>
<updated>2026-07-08T18:20:30+00:00</updated>
<author>
<name>Shahyan Soltani</name>
<email>shahyan.soltani@amd.com</email>
</author>
<published>2026-06-03T13:23:04+00:00</published>
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<id>urn:sha1:fbf41e05119f43e9d69307272ced4ed3b82ad371</id>
<content type='text'>
Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h
into its own dedicated header amdgpu_wb.h.

Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h.

Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of
amdgpu_device.c into new dedicated amdgpu_wb.c file.

Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini().

Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(),
amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into
amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini().

Update amdgpu/Makefile to build amdgpu_wb.o.

This is part of the ongoing effort to reduce the size of amdgpu.h into
their own respective separate headers.

Signed-off-by: Shahyan Soltani &lt;shahyan.soltani@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sdma4: replace BUG_ON with WARN_ON in fence emission</title>
<updated>2026-05-05T13:56:51+00:00</updated>
<author>
<name>John B. Moore</name>
<email>jbmoore61@gmail.com</email>
</author>
<published>2026-04-27T21:06:28+00:00</published>
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<id>urn:sha1:b90250bd933afd1ba94d86d6b13821997b22b18e</id>
<content type='text'>
sdma_v4_0_ring_emit_fence() contains two BUG_ON(addr &amp; 0x3) assertions
that verify fence writeback addresses are dword-aligned.  These
assertions can be reached from unprivileged userspace via crafted
DRM_IOCTL_AMDGPU_CS submissions, causing a fatal kernel panic in a
scheduler worker thread.

Replace both BUG_ON() calls with WARN_ON() to log the condition without
crashing the kernel.  A misaligned fence address at this point indicates
a driver bug, but crashing the kernel is never the correct response when
the assertion is reachable from userspace.

The CS IOCTL path is the correct place to filter invalid submissions;
the ring emission callback is too late to do anything about it.

Fixes: 2130f89ced2c ("drm/amdgpu: add SDMA v4.0 implementation (v2)")
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: John B. Moore &lt;jbmoore61@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: only use working sdma schedulers for ttm</title>
<updated>2026-04-17T19:41:12+00:00</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2026-01-08T16:03:30+00:00</published>
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<id>urn:sha1:e4029f7a9474319114d07caa90cff3ec534ef0d9</id>
<content type='text'>
It's possible that some sdma instances aren't working so we shouldn't try
to use them from TTM. To achieve this, delay the call to
amdgpu_sdma_set_buffer_funcs_scheds after the rings have been tested, and
then use the 'ready' property to decide if a sched should be used or not.

Note that currently it's not doing much, because if the ring helper fails
for any ring, the whole sdma block init fails.

---
v5: check buffer_funcs_enabled from amdgpu_ttm_access_memory_sdma
---

Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: pass all the sdma scheds to amdgpu_mman</title>
<updated>2026-04-17T19:41:12+00:00</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2025-11-18T14:47:37+00:00</published>
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<id>urn:sha1:01c836788b373329cd6dfea6508d80314eb9bae5</id>
<content type='text'>
This will allow the use of all of them for clear/fill buffer
operations.
Since drm_sched_entity_init requires a scheduler array, we
store schedulers rather than rings. For the few places that need
access to a ring, we can get it from the sched using container_of.

Since the code is the same for all sdma versions, add a new
helper amdgpu_sdma_set_buffer_funcs_scheds to set buffer_funcs_scheds
based on the number of sdma instances.

Note: the new sched array is identical to the amdgpu_vm_manager one.
These 2 could be merged.

Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Acked-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/sdma4.0: adjust SDMA limits</title>
<updated>2026-02-23T19:39:32+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2025-09-11T14:32:34+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=e210ed64d24ea8ac06750361630e3e5cda841a51'/>
<id>urn:sha1:e210ed64d24ea8ac06750361630e3e5cda841a51</id>
<content type='text'>
SDMA 4.4.x has increased transfer limits.

v2: fix harder, use shifts to make it more obvious

Cc: Vitaly Prosyak &lt;vitaly.prosyak@amd.com&gt;
Reviewed-by: Vitaly Prosyak &lt;vitaly.prosyak@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: introduce amdgpu_sdma_set_vm_pte_scheds</title>
<updated>2026-02-23T19:16:30+00:00</updated>
<author>
<name>Pierre-Eric Pelloux-Prayer</name>
<email>pierre-eric.pelloux-prayer@amd.com</email>
</author>
<published>2025-09-09T13:39:24+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=e3dc7976054668a5556291f8162f050693160afb'/>
<id>urn:sha1:e3dc7976054668a5556291f8162f050693160afb</id>
<content type='text'>
All sdma versions used the same logic, so add a helper and move the
common code to a single place.

---
v2: pass amdgpu_vm_pte_funcs as well
v3: drop all the *_set_vm_pte_funcs one liners
v5: rebased
---

Signed-off-by: Pierre-Eric Pelloux-Prayer &lt;pierre-eric.pelloux-prayer@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm: amdgpu: Use struct drm_wedge_task_info inside of struct amdgpu_task_info</title>
<updated>2025-06-17T14:32:47+00:00</updated>
<author>
<name>André Almeida</name>
<email>andrealmeid@igalia.com</email>
</author>
<published>2025-06-17T12:49:48+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=35dc4ce200623fec8f8eda256cd8abb5befbfae2'/>
<id>urn:sha1:35dc4ce200623fec8f8eda256cd8abb5befbfae2</id>
<content type='text'>
To avoid a cast when calling drm_dev_wedged_event(), replace pid and
task name inside of struct amdgpu_task_info with struct
drm_wedge_task_info.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Link: https://lore.kernel.org/r/20250617124949.2151549-6-andrealmeid@igalia.com
Signed-off-by: André Almeida &lt;andrealmeid@igalia.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: update the handle ptr in is_idle</title>
<updated>2025-02-25T16:43:58+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2025-02-19T18:10:52+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=7dc340540363a008cee1e160e8f2a4f034f196d4'/>
<id>urn:sha1:7dc340540363a008cee1e160e8f2a4f034f196d4</id>
<content type='text'>
Update the *handle to amdgpu_ip_block ptr for all
functions pointers of is_idle.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
