<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
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<updated>2026-07-01T15:42:37+00:00</updated>
<entry>
<title>drm/amdgpu,amdkfd: correct setting MES queue type</title>
<updated>2026-07-01T15:42:37+00:00</updated>
<author>
<name>Geoffrey McRae</name>
<email>geoffrey.mcrae@amd.com</email>
</author>
<published>2026-06-24T02:32:18+00:00</published>
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<id>urn:sha1:89db46e455abf1654f88d36e5429cb408abbc95e</id>
<content type='text'>
MES ADD_QUEUE programs the firmware with the queue type from the driver
input, but MES REMOVE_QUEUE leaves queue_type at the zero-initialized
value.  Zero decodes as GFX in the MES REMOVE_QUEUE packet.

That means removing a KFD compute queue can be submitted to MES as a GFX
queue.  In a debug-trap suspend/remove sequence this can leave MES
looking for the doorbell in the wrong queue class and the REMOVE_QUEUE
command may never complete.  The observed failing packet removed
doorbell 0x1002 with queue_type=GFX even though the corresponding
ADD_QUEUE for the same doorbell was queue_type=COMPUTE.

Populate REMOVE_QUEUE.queue_type the same way ADD_QUEUE does.

Signed-off-by: Geoffrey McRae &lt;geoffrey.mcrae@amd.com&gt;
Reviewed-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement per-process MES context</title>
<updated>2026-06-17T20:20:37+00:00</updated>
<author>
<name>Zhu Lingshan</name>
<email>lingshan.zhu@amd.com</email>
</author>
<published>2026-06-12T06:02:49+00:00</published>
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<id>urn:sha1:97bcaf15ad25b14bd272fdff3616f9af5a8820c5</id>
<content type='text'>
MES process context is a process-level page
where process specific context is saved for
MES scheduler.

However, current user-queue code path assigns
fw_obj of a queue to MES process_context_addr
when adding the queue to MES.

This means every new queue from the same process
would replace the previous process context address
with that queue's fw_obj address.
What's worse is, when user space frees a queue,
its fw_obj will be freed as well, causing MES
working on a NULL page pointer.

This issue leads to inconsistency and crash
in the scheduler.

This commit allocates a process-level page for
MES process contexts for a process other than queue-level

Signed-off-by: Zhu Lingshan &lt;lingshan.zhu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use a single entry point for mes compute reset</title>
<updated>2026-06-17T19:51:35+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-05-19T22:34:00+00:00</published>
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<id>urn:sha1:f94bbd648bb499a96aab6fd90d44fb4b1ddcd9e3</id>
<content type='text'>
When we reset MES queues we need to coordinate across
KGD and KFD.  Use a single function to handle the
queue resets across KFD and KGD.

v2: squash in fixes for userqs

Co-developed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Co-developed-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: add MES userq reset helper</title>
<updated>2026-06-17T19:51:35+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-05-20T20:11:40+00:00</published>
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<id>urn:sha1:b86e1ea9e2290088d676442ddec29da9663416c2</id>
<content type='text'>
Will be used by the common compute queue reset handler.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: drop detect_and_reset callback</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-04-30T18:57:59+00:00</published>
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<id>urn:sha1:7f9569006302c764e692831ef0095aaa9b1eff85</id>
<content type='text'>
No longer needed.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: add mes userq reset callback</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-04-30T16:49:06+00:00</published>
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<id>urn:sha1:5f98f9d1a2d423ef5adcaa6783a351f728b7f373</id>
<content type='text'>
Enable per queue reset for MES managed queues.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: move wptr_obj cleanup in mqd_destroy</title>
<updated>2026-06-03T17:58:51+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2026-05-25T04:26:23+00:00</published>
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<id>urn:sha1:43355f62cd2ef5386c2693df537c232ea0f2ce6c</id>
<content type='text'>
In case when queue_create fails and mqd has already been
allocated and hence wptr_obj is not cleaned up.

So moving that cleanup part to mqd_destroy so it takes
care of all the cases of clean up and during tear down of
the queue.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: use array instead of list for userq_vas</title>
<updated>2026-05-27T14:50:02+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2026-05-20T11:09:49+00:00</published>
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<id>urn:sha1:ef7dc711a664b0c548ecfdf13a00436b7446b8e7</id>
<content type='text'>
Use arrays instead of list for userq_vas since we have fixed no
of bos. Also, we dont have to worry to free that memory later
since this array would be free along with queue only.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: remove amdgpu_userq_create/destroy_object wrapper</title>
<updated>2026-05-27T14:48:34+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2026-05-20T10:43:09+00:00</published>
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<id>urn:sha1:deb02080ca5d3f015cf71e56067a39ef2f141998</id>
<content type='text'>
Remove the amdgpu_userq_create/destroy_object wrappers and
use directly the kernel bo allocation function which does all the
things which are done in wrapper.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Suggested-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/userq: add amdgpu_bo_unpin when amdgpu_ttm_alloc_gart fails</title>
<updated>2026-05-27T14:39:20+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2026-05-18T13:03:00+00:00</published>
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<id>urn:sha1:d8145c437ccdc2d91c579787290f82788172bea0</id>
<content type='text'>
Unpin the wptr_obj-&gt;obj when amdgpu_ttm_alloc_gart fails.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
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