linux-next.git/drivers/gpu/drm/amd/amdgpu/amdgpu_rlc.h, branch master

drm/amdgpu: Choose SOC15 RLC register read write functions at init time

2026-06-17T20:32:04+00:00

Currently on every RLC register read the driver checks for three different conditions to decide which of the two register read/write functions to call. As these register operations are macros, which is required for register name expansion to work, the result is a significant explosion of generated (redundant) code which the compiler cannot optimise away. We however know that all of the three conditional are static and can therefore move the decision to driver init time. All that we need to do is define a new vfunc table for the SOC12 RLC read/write functions and just use them directly. Bloat-o-meter agrees the driver size savings are significant: add/remove: 11/35 grow/shrink: 82/1117 up/down: 53024/-450922 (-397898) ... Total: Before=10293928, After=9896030, chg -3.87% Signed-off-by: Tvrtko Ursulin Signed-off-by: Alex Deucher

drm/amdgpu: RLC-G VF Register Access Interface

2026-01-05T21:59:57+00:00

- Implement Gfx v12.1 VFi interface under SRIOV - Redirect all RLCG interface access to new function after Gfx v12.1 v2: squash in register updates Signed-off-by: Bokun Zhang Signed-off-by: Alex Deucher

drm/amdgpu: Add rlcv firmware for frontdoor loading.

2025-12-08T18:56:31+00:00

Rlcv is required to be loaded for frontdoor. 1. Add 2 rlcv ucode ids: AMDGPU_UCODE_RLC_IRAM_1 and AMDGPU_UCODE_RLC_DRAM_1 2. Add rlc_firmware_header_v2_5 for above 2 rlcv headers. 3. Add 2 types in psp_fw_gfx_if interface interacting with asp: GFX_FW_TYPE_RLX6_UCODE_CORE1 - RLCV IRAM GFX_FW_TYPE_RLX6_DRAM_BOOT_CORE1 - RLCV DRAM BOOT Signed-off-by: Feifei Xu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdkfd: refactor rlc/gfx spm

2025-12-08T18:56:30+00:00

for adding multiple xcc support. Signed-off-by: James Zhu Reviewed-by: Bing Ma Reviewed-by: Gang Ba Signed-off-by: Alex Deucher

drm/amdgpu: Remove volatile from RLC files

2025-09-15T20:51:09+00:00

The RLC uses volatile with some pointers that are not directly related to any of the situations where volatile is advised to be used [1]. For this reason, this commit removes all the volatile occurrences associated with RLC. 1. https://docs.kernel.org/process/volatile-considered-harmful.html Reviewed-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: Remove volatile from CSB functions

2025-09-15T20:51:04+00:00

The CSB buffer manipulation occurs in memory where the BO is mapped during initialization, and some references to this buffer are handled with volatile, which is incorrect in this scenario. There are a few cases where the use of volatile is accepted, but none of them align with CSB operations. Therefore, this commit removes all the volatile variables associated with the CSB code. Reviewed-by: Christian König Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: Add documentation associated with CSB

2025-04-30T22:05:41+00:00

Add a description for the get_csb_buffer callback, update the glossary, and add some extra information about RB, which is associated with CSB configuration. Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: add rlc TOC header file for soc24

2024-05-02T20:18:10+00:00

Add RLC autoload TOC header file for soc24 ASIC. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add new TOC structure

2024-05-02T20:18:10+00:00

Add new RLC_TABLE_OF_CONTENT structure definition. Signed-off-by: Likun Gao Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amd/amdgpu: Update RLC_SPM_MC_CNT by ring wreg in guest

2024-01-18T20:45:58+00:00

Submit command of wreg in GFX and COMPUTE ring to update RLC_SPM_MC_CNT in guest machine during runtime. Signed-off-by: YuanShang Reviewed-by: Emily Deng Signed-off-by: Alex Deucher