<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
<link rel='self' href='http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/'/>
<updated>2026-06-17T20:22:02+00:00</updated>
<entry>
<title>drm/amdgpu: Add gfx12.0.1 adev to queue reset support</title>
<updated>2026-06-17T20:22:02+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-06-14T16:15:12+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=b54bf09ee083bdcf323321971d8d76d45701517c'/>
<id>urn:sha1:b54bf09ee083bdcf323321971d8d76d45701517c</id>
<content type='text'>
This patch adds the inclusion of gfx12.0.1 by checking GC's major number
and minor number equal to 12.0.* with the same mes_sched version.

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Expand MES queue/pipe reset support</title>
<updated>2026-06-17T19:51:36+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-05-06T19:02:35+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=c847c557bba84edb3286549aee18cf3a34182e08'/>
<id>urn:sha1:c847c557bba84edb3286549aee18cf3a34182e08</id>
<content type='text'>
MES in newer versions on gfx11 and gfx12 can support queue/pipe reset via
MES.

v2: update the fw version check (Jesse)

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gfx: add a common helper to handle MES compute resets</title>
<updated>2026-06-17T19:51:35+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-05-07T16:03:47+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=e49044061b37cc4be99bfd17f6ccdd3509300469'/>
<id>urn:sha1:e49044061b37cc4be99bfd17f6ccdd3509300469</id>
<content type='text'>
Add helpers to handle MES compute queue resets when multiple queues
are affected.  Can you be used by both KGD and KFD.

v2: sqaush in updates
v3: squash in userq updates

Co-developed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Co-developed-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Signed-off-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Allocate enough space for hpd info on gfx11</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-05-06T19:02:35+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=fe5dfb55dd70eed75d5f8f50657334f03c71deef'/>
<id>urn:sha1:fe5dfb55dd70eed75d5f8f50657334f03c71deef</id>
<content type='text'>
MES in newer versions on gfx11 and gfx12 can support queue/pipe
reset via MES.

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add a MMIO queue reset helper</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-05-14T19:39:36+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=51fe463018a311083195f95b3e4067f4b3833065'/>
<id>urn:sha1:51fe463018a311083195f95b3e4067f4b3833065</id>
<content type='text'>
Will be used by KFD for MMIO based resets.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/mes: add userq reset helper</title>
<updated>2026-06-17T19:51:34+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2026-04-30T16:00:26+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=b83490ad9845a7f9c1e91e9c076249bcfb745cfe'/>
<id>urn:sha1:b83490ad9845a7f9c1e91e9c076249bcfb745cfe</id>
<content type='text'>
Implement a userq reset helper using the doorbell
index.

Reviewed-by: Jesse Zhang &lt;jesse.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: compare MES firmware version ucode for gfx11</title>
<updated>2026-06-04T19:25:46+00:00</updated>
<author>
<name>Sunil Khatri</name>
<email>sunil.khatri@amd.com</email>
</author>
<published>2026-06-01T14:41:17+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=dd7bd8e0f0c47361a3a513d6aa8ea2b36dd70deb'/>
<id>urn:sha1:dd7bd8e0f0c47361a3a513d6aa8ea2b36dd70deb</id>
<content type='text'>
MES firmware should report the same version whether read from
the register or from the firmware ucode binary. This is not
always the case, so add a log when they mismatch.

Signed-off-by: Sunil Khatri &lt;sunil.khatri@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Support MES suspend_all_sdma_gangs</title>
<updated>2026-05-18T22:13:42+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-03-23T18:19:04+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=36c063e72fc2a53c02a4d96e81a14fef433a3948'/>
<id>urn:sha1:36c063e72fc2a53c02a4d96e81a14fef433a3948</id>
<content type='text'>
suspend_all_sdma_gangs is supported in new MES firmware for gfx 12.1

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Michael Chen&lt;michael.chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Reset queue/pipe in MES</title>
<updated>2026-04-28T18:46:00+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-03-13T10:08:40+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=eed95012c71ad887b3b524325c23dcbb1b6c16be'/>
<id>urn:sha1:eed95012c71ad887b3b524325c23dcbb1b6c16be</id>
<content type='text'>
When removing queues fails, KFD calls amdgpu_mes to detect and reset
hung queues, then cleans up those hung queues in KFD.

Suggested-by: Jonathan Kim &lt;jonathan.kim@amd.com&gt;
Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Missing multi-XCC support in MES</title>
<updated>2026-04-28T18:42:36+00:00</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2026-03-19T21:50:52+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=ef94439908c9ccb4d856c99a102fd2a0b1ea1662'/>
<id>urn:sha1:ef94439908c9ccb4d856c99a102fd2a0b1ea1662</id>
<content type='text'>
In a multi-XCC GPU, pass the master XCC's ID to amdgpu_mes_suspend,
amdgpu_mes_resume, and detect_and_reset_hung_queues so the command will be
sent to the matching master MES when the compute partition mode is not
SPX.

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
