<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux-next.git/drivers/cxl/core/memdev.c, branch master</title>
<subtitle>Linux kernel latest source</subtitle>
<id>http://mirrors.hust.edu.cn/git/linux-next.git/atom?h=master</id>
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<updated>2026-07-24T20:16:27+00:00</updated>
<entry>
<title>Merge branch 'for-7.3/cxl-fixes' into cxl-for-next</title>
<updated>2026-07-24T20:16:27+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2026-07-24T20:16:27+00:00</published>
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<id>urn:sha1:d86d39138b332d35d7ddb1d0679d7f2471512933</id>
<content type='text'>
Various CXL fixes

cxl/features: Clamp Get Feature output size to the remaining buffer
cxl/features: Reject Set Features output buffer smaller than the header
cxl/features: Reject Get Feature count larger than the output buffer
cxl/port: Restart port enumeration when a sibling adds the dport first
cxl/features: Serialize multi-part Get/Set Feature transfers
cxl/pci: Honor -EPROBE_DEFER from component register setup
cxl/mbox: Break poison list loop on an empty payload
cxl/memdev: Fix firmware upload exact-fit handling
cxl/features: bound fwctl command payload to the input buffer
cxl/mce: Make the MCE notifier per-region
cxl/pci: Remove incorrect mbox.valid check in cxl_pci_type3_init_mailbox()
cxl: docs/linux/dax-driver - fix typos
cxl: fix mailbox return code description typo
cxl/mbox: Clamp mailbox output allocation to the payload size
</content>
</entry>
<entry>
<title>cxl/memdev: Fix firmware upload exact-fit handling</title>
<updated>2026-07-14T15:55:26+00:00</updated>
<author>
<name>Guzebing</name>
<email>Guzebing1612@gmail.com</email>
</author>
<published>2026-07-13T11:27:44+00:00</published>
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<id>urn:sha1:af5035e1b3e400067bb003975936e5407377e7a3</id>
<content type='text'>
cxl_fw_prepare() classifies a firmware image as a one-shot transfer
only when its Transfer FW input payload is smaller than the mailbox
payload size. An image that exactly fills the payload is therefore
treated as a multi-part transfer.

The firmware loader invokes cxl_fw_write() only once for that image.
Since both offset == 0 and remaining == 0, the multi-part action
selection sends INITIATE, never sends END, and then attempts to activate
the target slot.

Include equality in the one-shot classification so exact-fit images use
the FULL action.

Fixes: 9521875bbe00 ("cxl: add a firmware update mechanism using the sysfs firmware loader")
Signed-off-by: Guzebing &lt;Guzebing1612@gmail.com&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://patch.msgid.link/20260713112744.2543829-1-guzebing1612@gmail.com
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>cxl: Support dpa without a mailbox</title>
<updated>2026-06-29T17:55:47+00:00</updated>
<author>
<name>Alejandro Lucero</name>
<email>alucerop@amd.com</email>
</author>
<published>2026-06-29T18:37:27+00:00</published>
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<id>urn:sha1:96ddf1af34f5f9e29891a5bfb7a18dd0a5bab9d6</id>
<content type='text'>
Type3 relies on mailbox CXL_MBOX_OP_IDENTIFY command for initializing
memdev state params which end up being used for DPA initialization.

Allow a Type2 driver to initialize DPA simply by giving the size of its
volatile hardware partition.

Move related functions to memdev.

Signed-off-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Reviewed-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Reviewed-by: Ben Cheatham &lt;benjamin.cheatham@amd.com&gt;
Reviewed-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Acked-by: Edward Cree &lt;ecree.xilinx@gmail.com&gt;
Link: https://patch.msgid.link/20260629183727.51502-3-alejandro.lucero-palau@amd.com
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>cxl/memdev: Introduce cxl_class_memdev_type</title>
<updated>2026-06-12T20:47:29+00:00</updated>
<author>
<name>Dan Williams</name>
<email>djbw@kernel.org</email>
</author>
<published>2026-05-19T21:01:57+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=2ed519c21bb4fbac5d544ef4b1f98d515b18036d'/>
<id>urn:sha1:2ed519c21bb4fbac5d544ef4b1f98d515b18036d</id>
<content type='text'>
In preparation for memdev's without mailbox related infrastructure,
introduce cxl_class_memdev_type as a superset of a cxl_memdev_type.
Effectively the only difference is that cxl_class_memdev_type exports
common sysfs attributes where cxl_memdev_type has none.

Related to this is all the cxl_mem_probe() paths that assume the presence
of a class device mailbox are updated to skip that requirement.

Co-developed-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Signed-off-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Signed-off-by: Dan Williams &lt;djbw@kernel.org&gt;
Tested-by: ALejandro Lucero &lt;alucerop@amd.com&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://patch.msgid.link/20260519210158.1499795-5-djbw@kernel.org
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>cxl/memdev: Pin parents for entire memdev lifetime</title>
<updated>2026-06-12T20:47:29+00:00</updated>
<author>
<name>Dan Williams</name>
<email>djbw@kernel.org</email>
</author>
<published>2026-05-19T21:01:56+00:00</published>
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<id>urn:sha1:bd3a6ff4b84e0fc3fca8556d338270603df13f2e</id>
<content type='text'>
In order to be able to manage the driver that uses a memdev attach
mechanism the parent needs to stick around for the
device_release_driver(cxlmd-&gt;dev.parent) event.

Fixes: 29317f8dc6ed ("cxl/mem: Introduce cxl_memdev_attach for CXL-dependent operation")
Signed-off-by: Dan Williams &lt;djbw@kernel.org&gt;
Reviewed-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Tested-by: ALejandro Lucero &lt;alucerop@amd.com&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://patch.msgid.link/20260519210158.1499795-4-djbw@kernel.org
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-7.1/cxl-type2-support' into cxl-for-next</title>
<updated>2026-04-03T19:18:23+00:00</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2026-04-03T19:18:23+00:00</published>
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<id>urn:sha1:7aacc625576d4dc9c7d8a687f168ff72b30ca353</id>
<content type='text'>
Prep patches for CXL type2 accelerator basic support

cxl/region: Factor out interleave granularity setup
cxl/region: Factor out interleave ways setup
cxl: Make region type based on endpoint type
cxl/pci: Remove redundant cxl_pci_find_port() call
cxl: Move pci generic code from cxl_pci to core/cxl_pci
cxl: export internal structs for external Type2 drivers
cxl: support Type2 when initializing cxl_dev_state
</content>
</entry>
<entry>
<title>cxl/core: Check existence of cxl_memdev_state in poison test</title>
<updated>2026-03-31T22:18:06+00:00</updated>
<author>
<name>Alison Schofield</name>
<email>alison.schofield@intel.com</email>
</author>
<published>2026-03-31T00:50:45+00:00</published>
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<id>urn:sha1:261a02b93d9b6dfdc49b3e675be1a0e677cf71f3</id>
<content type='text'>
Before now, all CXL memdevs were assumed to have a mailbox-backed
cxl_memdev_state, so poison command checks could safely dereference
the @mds.

With the introduction of Type 2 devices, a memdev may not implement
a mailbox interface, and so there is no associated cxl_memdev_state.
Guard against this case by returning false when @mds is absent.

Signed-off-by: Alison Schofield &lt;alison.schofield@intel.com&gt;
Reviewed-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Link: https://patch.msgid.link/20260331005047.2813980-1-alison.schofield@intel.com
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>cxl: support Type2 when initializing cxl_dev_state</title>
<updated>2026-03-16T23:24:29+00:00</updated>
<author>
<name>Alejandro Lucero</name>
<email>alucerop@amd.com</email>
</author>
<published>2026-03-06T16:47:38+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=9a775c07bb04384f7c03a35dd04818ed818c1f71'/>
<id>urn:sha1:9a775c07bb04384f7c03a35dd04818ed818c1f71</id>
<content type='text'>
In preparation for type2 drivers add function and macro for
differentiating CXL memory expanders (type 3) from CXL device
accelerators (type 2) helping drivers built from public headers
to embed struct cxl_dev_state inside a private struct.

Update type3 driver for using this same initialization.

Signed-off-by: Alejandro Lucero &lt;alucerop@amd.com&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Reviewed-by: Alison Schofield &lt;alison.schofield@intel.com&gt;
Reviewed-by: Gregory Price &lt;gourry@gourry.net&gt;
Reviewed-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Link: https://patch.msgid.link/20260306164741.3796372-2-alejandro.lucero-palau@amd.com
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>cxl/memdev: fix deadlock in cxl_memdev_autoremove() on attach failure</title>
<updated>2026-02-23T16:03:44+00:00</updated>
<author>
<name>Gregory Price</name>
<email>gourry@gourry.net</email>
</author>
<published>2026-02-11T19:22:27+00:00</published>
<link rel='alternate' type='text/html' href='http://mirrors.hust.edu.cn/git/linux-next.git/commit/?id=318c58852e686c009825ae8c071080b9ccdd2af0'/>
<id>urn:sha1:318c58852e686c009825ae8c071080b9ccdd2af0</id>
<content type='text'>
cxl_memdev_autoremove() takes device_lock(&amp;cxlmd-&gt;dev) via guard(device)
and then calls cxl_memdev_unregister() when the attach callback was
provided but cxl_mem_probe() failed to bind.

cxl_memdev_unregister() calls
  cdev_device_del()
    device_del()
      bus_remove_device()
        device_release_driver()

This path is reached when a driver uses the @attach parameter to
devm_cxl_add_memdev() and the CXL topology fails to enumerate (e.g.
DVSEC range registers decode outside platform-defined CXL ranges,
causing the endpoint port probe to fail).

Add cxl_memdev_attach_failed() to set the scope of the check correctly.

Reported-by: kreview-c94b85d6d2
Fixes: 29317f8dc6ed ("cxl/mem: Introduce cxl_memdev_attach for CXL-dependent operation")
Signed-off-by: Gregory Price &lt;gourry@gourry.net&gt;
Reviewed-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
Reviewed-by: Davidlohr Bueso &lt;dave@stgolabs.net&gt;
Link: https://patch.msgid.link/20260211192228.2148713-1-gourry@gourry.net
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
</content>
</entry>
<entry>
<title>Convert 'alloc_flex' family to use the new default GFP_KERNEL argument</title>
<updated>2026-02-22T01:09:51+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-22T01:06:51+00:00</published>
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<id>urn:sha1:323bbfcf1ef8836d0d2ad9e2c1f1c684f0e3b5b3</id>
<content type='text'>
This is the exact same thing as the 'alloc_obj()' version, only much
smaller because there are a lot fewer users of the *alloc_flex()
interface.

As with alloc_obj() version, this was done entirely with mindless brute
force, using the same script, except using 'flex' in the pattern rather
than 'objs*'.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
</feed>
